參數(shù)資料
型號: XRT83SL30IV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述: DATACOM, PCM TRANSCEIVER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, TQFP-64
文件頁數(shù): 29/76頁
文件大小: 376K
代理商: XRT83SL30IV
á
XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
TRANSMIT AND RECEIVE TERMINATIONS
REV. P1.0.4
26
The XRT83SL30 is a versatile LIU that can be programmed to use one Bill of Materials (BOM) for worldwide
applications for T1, J1 and E1. For specific applications the internal terminations can be disabled to allow the
use of existing components and/or designs.
RECEIVER
I
NTERNAL
R
ECEIVE
T
ERMINATION
M
ODE
In
Hardware
mode, RXTSEL (Pin 44) can be tied “High” to select internal termination mode or tied “Low” to
select external termination mode. By default the XRT83SL30 is set for external termination mode at power up
or at
Hardware
reset.
In
Host
mode, bit 7 in the appropriate register, (
Table 19, “Microprocessor Register #1 bit description,” on
page 44
), is set “High” to select the internal termination mode for the receive channel.
If the internal termination mode (RXTSEL = “1”) is selected, the effective impedance for E1, T1 or J1 can be
achieved either with an internal resistor or a combination of internal and external resistors as shown in
Table 7
.
T
ABLE
6: R
ECEIVE
T
ERMINATION
C
ONTROL
RXTSEL
RX TERMINATION
0
EXTERNAL
1
INTERNAL
F
IGURE
11. S
IMPLIFIED
D
IAGRAM
FOR
THE
I
NTERNAL
R
ECEIVE
AND
T
RANSMIT
T
ERMINATION
M
ODE
T1
TTIP
TRING
5
8
1:2
75
, 100
110
or 120
4
1
0.68
μ
F
R
int
R
int
TTIP
TRING
TX
Line Driver
T2
RTIP
RRING
1
4
1:1
8
5
RTIP
RRING
RX
Equalizer
R
int
TPOS
TNEG
TCLK
RPOS
RNEG
RCLK
75
, 100
110
or 120
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