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參數(shù)資料
| 型號： | XRT83SL28IV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 4/47頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU SH E1 8CH 144TQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 8/8 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-TQFP（20x20） |
| 包裝： | 托盤 |
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XRT83SL28
xr
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
10
HARDWARE MODE INTERFACE
NAME
PIN
TYPE
DESCRIPTION
SR/DR
2
I
Single Rail / Dual Rail Select Input
This pin is used to select Single Rail or Dual Rail data formats. By default,
Dual Rail is selected. To select Single Rail mode, this pin must be pulled
"High". Once this pin is pulled "High", TNEGn/CODEn can be used to select
between AMI and HDB3 Encoding/Decoding.
NOTE: Internally pulled "Low" with a 50k
resistor.
TERSEL1
TERSEL0
125
124
I
Termination Impedance Select
TERSEL[1:0] are used to set the internal impedance of the LIU for the Receive
and Transmit paths.
"00" = 75
for Tx and "High-Z" for Rx
"01" = 120
for Tx and "High-Z" for Rx
"10" = 75
for Tx and Rx
"11" = 120
for Tx and Rx
TCLKinv
107
I
Transmit Clock Data
"Low" = TPOS/TNEG data is sampled on the falling edge of TCLK
"High" = TPOS/TNEG data is sampled on the rising edge of TCLK
NOTE: Internally pulled "Low" with a 50k
resistor.
RCLKinv
74
I
Receive Clock Data
"Low" = RPOS/RNEG data is updated on the rising edge of RCLK
"High" = RPOS/RNEG data is updated on the falling edge of RCLK
NOTE: Internally pulled "Low" with a 50k
resistor.
LBM1
LBM0
56
57
I
Loop Back Mode Select
LBM[1:0] are used to configure the LIU into diagnostic loopback modes. To
select the channel number, see pins CHLB[3:0].
NOTE: Internally pulled "Low" with a 50k
resistor.
JASEL1
JASEL0
20
21
I
Jitter Attenuator Select
JASEL[1:0] are used to configure the jitter attenuator into the Receive or
Transmit path for all eight channels.
NOTE: Internally pulled "Low" with a 50k
resistor.
LBM1
Digital Loopback
LBM0
Remote Loopback
Analog Loopback
No Loopback
Loopback Mode
0
1
0
1
0
1
JA Disabled
Receive Path
Transmit Path
JA Disabled
JA Select Mode
JASEL1
1
0
JASEL0
0
1
0
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83SL30 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83SL30ES | 功能描述:外圍驅(qū)動器與原件 - PCI 1 CHT1/E1 LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83SL30IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83SL30IV-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT83SL30IVTR-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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