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參數(shù)資料
| 型號： | XRT83SL28IV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 31/47頁 |
| 文件大小： | 0K |
| 描述： | IC LIU SH E1 8CH 144TQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 8/8 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-TQFP（20x20） |
| 包裝： | 托盤 |
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XRT83SL28
REV. 1.0.0
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
35
TABLE 7: MICROPROCESSOR REGISTER 0X00H BIT DESCRIPTION
GLOBAL CONTROL REGISTER FOR ALL 8 CHANNELS (0X00H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
GIE
Global Interrupt Enable
The global interrupt enable is used to enable/disable all interrupt
activity for all 8 channels. This bit must be set "High" for the inter-
rupt pin to operate.
"0" = Disable all interrupt generation
"1" = Enable interrupt generation to the individual channel registers
R/W
0
D6
SR/DR
Single Rail / Dual Rail Select
This bit is used to configure the receive outputs and transmit inputs
to single rail or dual rail data formats.
"0" = Dual Rail
"1" = Single Rail
R/W
0
D5
CODE
Encoding / Decoding Select (Single Rail Mode Only)
This bit is used to select between AMI or HDB3.
"0" = HDB3
"1" = AMI
R/W
0
D4
RCLKinv
Receiver Clock Data
"0" = RPOS/RNEG data is updated on the rising edge of RCLK
"1" = RPOS/RNEG data is updated on the falling edge of RCLK
R/W
0
D3
TCLKinv
Transmitter Clock Data
"0" = TPOS/TNEG data is sampled on the falling edge of TCLK
"1" = TPOS/TNEG data is sampled on the rising edge of TCLK
R/W
0
D2
FIFOS
FIFO Depth Select
The FIFO depth select is used to configure the part for a 32-bit or
64-bit FIFO (Within the Jitter Attenuator Block). The delay of the
FIFO is typically equal to the FIFO depth.
"0" = 32-bit FIFO
"1" = 64-bit FIFO
R/W
0
D1
D0
JASEL1
JASEL0
Jitter Attenuator Select
These bits are used to configure the Jitter Attenuator into the
Receive or Transmit path.
"00" = Disabled
"01" = Transmit Path
"10" = Receive Path
"11" = Disabled
R/W
0
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| XRT83SL30 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
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| XRT83SL30IVTR-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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