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參數(shù)資料
型號(hào)： XRT83L314IB-L
廠商： Exar Corporation
文件頁(yè)數(shù)： 12/84頁(yè)
文件大?。?/td> 0K
描述： IC LIU T1/E1/J1 14CH 304TBGA
標(biāo)準(zhǔn)包裝： 27
類(lèi)型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 14/14
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 304-LBGA
供應(yīng)商設(shè)備封裝： 304-TBGA（31x31）
包裝： 托盤(pán)
XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
2
FEATURES
Fully integrated 14-Channel short haul and long
haul transceivers for T1/J1 (1.544MHz) and E1
(2.048MHz) applications.
T1/E1/J1 short haul, long haul, and clock rate are
per
port
selectable
through
software
without
changing components.
Internal Impedance matching on both receive and
transmit for 75
(E1), 100 (T1), 110 (J1), and
120
(E1) applications are per port selectable
through software without changing components.
Power down on a per channel basis with
independent receive and transmit selection.
Five pre-programmed transmit pulse settings for T1
short haul applications.
Arbitrary pulse generator for T1 and E1 modes.
Transmit line build outs (LBO) for T1 long haul
applications from 0dB to -22.5dB in three -7.5dB
steps on a per channel basis.
On-Chip transmit short-circuit protection and
limiting protects line drivers from damage on a per
channel basis.
Independent Crystal-Less digital jitter attenuators
(JA) with 32-Bit or 64-Bit FIFO for the receive and
transmit paths
On-Chip frequency multiplier generates T1 or E1
master clocks from a variety of external clock
sources (8, 16, 56, 64, 128, 256kHz and 1X, 2X,
4X, 8X T1 or E1)
Driver failure monitor output (DMO) alerts of
possible system or external component problems.
Transmit outputs and receive inputs may be "High"
impedance
for
protection
or
redundancy
applications on a per channel basis.
Support for automatic protection switching.
1:1 and 1+1 protection without relays.
Selectable receiver sensitivity from 0 to 36dB cable
loss in T1 @ 772kHz, and 0 to 43dB cable loss in
E1 @ 1,024kHz.
Receive monitor mode handles 0 to 29dB resistive
attenuation (flat loss) along with 0 to 6dB cable loss
for both T1 and E1.
Receiver line attenuation indication output in 1dB
steps.
Loss of signal (RLOS) according to ITU-T G.775/
ETS300233 (E1) and ANSI T1.403 (T1/J1).
Programmable receive slicer threshold (45%, 50%,
55%, or 68%) for improved receiver interference
immunity.
Programmable data stream muting upon RLOS
detection.
On-Chip HDB3/B8ZS encoder/decoder with an
internal 16-bit LCV counter for each channel.
On-Chip digital clock recovery circuit for high input
jitter tolerance.
QRSS pattern generator and detection for testing
and monitoring.
Error and bipolar violation insertion and detection.
Transmit all ones (TAOS) and in-band network loop
up and loop down code generation.
Automatic loop code detection for remote loopback
activation.
Supports local analog, remote, digital, and dual
loopback modes.
Low Power dissipation: 170mW per channel (50%
density).
250mW per channel maximum power dissipation
(100% density).
Single 3.3V supply operation (3V to 5V I/O
tolerant).
304-Pin TBGA package
-40°C to +85°C Temperature Range
Supports gapped clocks for mapper/multiplexer
applications.
PRODUCT ORDERING INFORMATION
PRODUCT NUMBER
PACKAGE TYPE
OPERATING TEMPERATURE RANGE
XRT83L314IB
304 Lead TBGA
-40°C to +85°C
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