GBW
參數(shù)資料
型號： XE8805AMI028LF
廠商： Semtech
文件頁數(shù)： 34/156頁
文件大小： 0K
描述： IC DAS 16BIT FLASH 8K MTP 64LQFP
標(biāo)準(zhǔn)包裝： 160
系列： XE880x
應(yīng)用： 感測機(jī)
核心處理器： Coolrisc816?
程序存儲器類型： 閃存（22 kB）
控制器系列： XE8000
RAM 容量： 512 x 8
接口： UART，USRT
輸入/輸出數(shù)： 24
電源電壓： 2.4 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
包裝： 托盤
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
產(chǎn)品目錄頁面： 585 (CN2011-ZH PDF)
配用： XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
Semtech 2006
www.semtech.com
18-8
XE8805/05A
sym
description
min
typ
max
unit
Comment
gain
gain at DC
80
100
dB
1
GBW0
gain bandwidth product
25
70
kHz
6
CL0
capacitive load
5
nF
6
GBW1
gain bandwidth product
250
450
kHz
7
CL1
capacitive load
200
pF
7
φ
m
phase margin
55
65
°
8
RL
resistive load
5
k
5
SR
slew rate
10
30
kV/s
9
CMR
common mode input range
VSS-0.2
VBAT-1.2
V
2
OR
output range
VSS+0.2
VBAT-0.2
V
Voff
offset
±5
mV
CMRR
common mode rejection
60
dB
3
noise
integrated input noise
50
100
uVrms
PSRR
power
supply
rejection
ratio
20
60
dB
4
Iquie
quiescent bias current
150
uA
Ioff
off current
1
uA
1.
For the minimal resistive load and the maximal capacitive load
2.
The amplifier common mode is VSS in the 4-20mA loop.
3.
At DC
4.
At DC. Only a low rejection ratio is needed since the D/A output refers directly to the power supplies.
5.
Short circuit protection at >3mA.
6.
GBW when the maximal load is cl0 and with the bit BW=0
7.
GBW when the maximal load is cl1 and with the bit BW=1
8.
In both cases BW=0 and BW=1 for the maximal capacitive load and the minimal resistive load.
9.
For maximal load CL0, BW=0 and maximal resistive load RL
Table 18-8. Specification of the amplifier.
18.6
Low pass filter
Several low pass filters are proposed here as examples. Other filter types are possible depending on the features
or constraints of the application.
If the filter is inverting the signal, the bit INV can be used to invert the D/A output. This inversion does not need to
be done by calculation.
A first or second order low pas filter can be built with the amplifier. If higher order filters are needed, additional first
or second order sections can be added using external amplifiers.
18.6.1
First order low pass filter
Figure 18-2 shows a possible implementation of a first order low pass filter. Ideally, the analog ground should be
halfway between VBAT and VSS. The gain G and cut-off frequency fc of such a filter are given by:
C
R
f
R
G
c
2
1
2
1
π
=
As an example, to obtain a 1kHz filter with unity gain, we can choose C=1nF and R1=R2=150k
.
Not
Recommended
for
New
Designs
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