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參數(shù)資料
| 型號(hào)： | XE8805AMI028LF |
| 廠商： | Semtech |
| 文件頁(yè)數(shù)： | 105/156頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS 16BIT FLASH 8K MTP 64LQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | XE880x |
| 應(yīng)用： | 感測(cè)機(jī) |
| 核心處理器： | Coolrisc816? |
| 程序存儲(chǔ)器類型： | 閃存（22 kB） |
| 控制器系列： | XE8000 |
| RAM 容量： | 512 x 8 |
| 接口： | UART，USRT |
| 輸入/輸出數(shù)： | 24 |
| 電源電壓： | 2.4 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 包裝： | 托盤 |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（10x10） |
| 產(chǎn)品目錄頁(yè)面： | 585 (CN2011-ZH PDF) |
| 配用： | XE8000MP-ND - PROG BOARD AND PROSTART2 CARD |
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Semtech 2006
www.semtech.com
8-2
XE8805/05A
8.1
Features
The XE8000 chips support 24 interrupt sources, divided into 3 levels of priority.
8.2
Overview
A CPU interruption is generated and memorized when an interrupt becomes active. The 24 interrupt sources are
divided into 3 levels of priority: High (8 interrupt sources), Mid (8 interrupt sources), and Low (8 interrupt sources).
Those 3 levels of priority are directly mapped to those supported by the CoolRisc (IN0, IN1 and IN2; see
CoolRisc documentation for more information).
RegIrqHig, RegIrqMid, and RegIrqLow are 8-bit registers containing flags for the interrupt sources. Those flags
are set when the interrupt is enabled (i.e. if the corresponding bit in the registers RegIrqEnHig, RegIrqEnMid or
RegIrqEnLow is set) and a rising edge is detected on the corresponding interrupt source.
Once memorized, an interrupt flag can be cleared by writing a ‘1’ in the corresponding bit of RegIrqHig, RegIrqMid
or RegIrqLow. Writing a ‘0’ does not modify the flag. To definitively clear the interrupt, one has to clear the
CoolRisc interrupt in the CoolRisc status register. All interrupts are automatically cleared after a reset.
Two registers are provided to facilitate the writing of interrupt service software. RegIrqPriority contains the number
of the highest priority interrupt set (its value is 0xFF when no interrupt is set). RegIrqIrq indicates the priority level
of the current interrupts. RegIrqIrq and RegIrqPriority ‘s values are dependent upon the memorized state of the
interrupts (as reflected in flags in RegIrqHig, RegIrqMid and RegIrqLow).
8.3
Register map
pos.
RegIrqHig
rw
reset
function
7
RegIrqHig[7]
r
c1
0 resetsystem
interrupt #23 (high priority)
clear interrupt #23 when 1 is written
6
RegIrqHig[6]
r
c1
0 resetsystem
interrupt #22 (high priority)
clear interrupt #22 when 1 is written
5
RegIrqHig[5]
r
c1
0 resetsystem
interrupt #21 (high priority)
clear interrupt #21 when 1 is written
4
RegIrqHig[4]
r
c1
0 resetsystem
interrupt #20 (high priority)
clear interrupt #20 when 1 is written
3
RegIrqHig[3]
r
c1
0 resetsystem
interrupt #19 (high priority)
clear interrupt #19 when 1 is written
2
RegIrqHig[2]
r
c1
0 resetsystem
interrupt #18 (high priority)
clear interrupt #18 when 1 is written
1
RegIrqHig[1]
r
c1
0 resetsystem
interrupt #17 (high priority)
clear interrupt #17 when 1 is written
0
RegIrqHig[0]
r
c1
0 resetsystem
interrupt #16 (high priority)
clear interrupt #16 when 1 is written
Table 8-1: RegIrqHig
Not
Recommended
for
New
Designs
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| XE8805AMI028TLF | 制造商:Semtech Corporation 功能描述: |
| XE8805MI028 | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:Data Acquisition MCU |
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| XE8806AMI026LF | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:Ultra Low-Power Low-Voltage |
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