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參數(shù)資料
| 型號： | WED3DL3216V10BI |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 16M X 32 SYNCHRONOUS DRAM, 7 ns, PBGA119 |
| 封裝： | 17 X 23 MM, MO-163, BGA-119 |
| 文件頁數(shù)： | 27/27頁 |
| 文件大?。?/td> | 989K |
| 代理商： | WED3DL3216V10BI |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WED3DL3216V
November, 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Current State
Command
Action
Notes
CE#
RAS#
CAS#
WE#
BA0-1
A0-A12
Description
Write with
Auto Precharge
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
4
L
H
BA
Row Address
Bank Activate
ILLEGAL
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
ILLEGAL
L
H
X
No Operation
Continue the Burst
H
X
Device Deselect
Continue the Burst
Precharging
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
No Operation; Bank(s) idle after tRP
L
H
BA
Row Address
Bank Activate
ILLEGAL
4
L
H
L
BA
Column
Write w/o Precharge
ILLEGAL
L
H
L
H
BA
Column
Read w/o Precharge
ILLEGAL
L
H
L
X
Burst Termination
No Operation; Bank(s) idle after tRP
L
H
X
No Operation
No Operation; Bank(s) idle after tRP
H
X
Device Deselect
No Operation; Bank(s) idle after tRP
Row Activating
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
4
L
H
BA
Row Address
Bank Activate
ILLEGAL
4,10
L
H
L
BA
Column
Write
ILLEGAL
4
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
No Operation; Row active after tRCD
L
H
X
No Operation
No Operation; Row active after tRCD
H
X
Device Deselect
No Operation; Row active after tRCD
Write
Recovering
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
4
L
H
BA
Row Address
Bank Activate
ILLEGAL
L
H
L
BA
Column
Write
Start Write; Determine if Auto Precharge
9
L
H
L
H
BA
Column
Read
Start Read; Determine if Auto Precharge
L
H
L
X
Burst Termination
No Operation; Row active after tDPL
L
H
X
No Operation
No Operation; Row active after tDPL
H
X
Device Deselect
No Operation; Row active after tDPL
Write
ecovering with
Auto Precharge
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
4
L
H
BA
Row Address
Bank Activate
ILLEGAL
L
H
L
BA
Column
Write
ILLEGAL
4,9
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
No Operation; Precharge after tDPL
L
H
X
No Operation
No Operation; Precharge after tDPL
H
X
Device Deselect
No Operation; Precharge after tDPL
CURRENT STATE TRUTH TABLE (cont.)
相關(guān)PDF資料 |
PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WED3DL3216V10ES | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16Mx32 SDRAM |
| WED3DL3216V7BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16Mx32 SDRAM |
| WED3DL3216V7BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16Mx32 SDRAM |
| WED3DL3216V7ES | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16Mx32 SDRAM |
| WED3DL3216V8BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16Mx32 SDRAM |
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