參數(shù)資料
型號(hào)： UPD780023AYCW(A)-XXX
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP64
封裝： 0.750 INCH, PLASTIC, SDIP-64
文件頁(yè)數(shù)： 59/92頁(yè)
文件大?。?/td> 689K
代理商： UPD780023AYCW(A)-XXX
62
PD780021A(A), 780022A(A), 780023A(A), 780024A(A), 780021AY(A), 780022AY(A), 780023AY(A), 780024AY(A)
Data Sheet U15131EJ3V0DS
AC Characteristics
(1) Basic Operation (TA = –40 to +85
°C, VDD = 1.8 to 5.5 V)
4.0 V
≤ VDD ≤ 5.5 V
2.7 V
≤ VDD < 4.0 V
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Cycle time
TCY
Operating with
0.238
16
s
(Min. instruction
main system clock
0.4
16
s
execution time)
1.6
16
s
Operating with subsystem clock
103.9Note 1
122
125
s
TI00, TI01 input
tTIH0, tTIL0
4.0 V
≤ VDD ≤ 5.5 V
2/fsam+0.1Note 2
s
high-/low-level
2.7 V
≤ VDD < 4.0 V
2/fsam+0.2Note 2
s
width
1.8 V
≤ VDD < 2.7 V
2/fsam+0.5Note 2
s
TI50, TI51 input
fTI5
2.7 V
≤ VDD ≤ 5.5 V
0
4
MHz
frequency
1.8 V
≤ VDD < 2.7 V
0
275
kHz
TI50, TI51 input
tTIH5, tTIL5
2.7 V
≤ VDD ≤ 5.5 V
100
ns
high-/low-level
1.8 V
≤ VDD < 2.7 V
1.8
ns
width
Interrupt request
tINTH, tINTL
INTP0 to INTP3,
2.7 V
≤ VDD ≤ 5.5 V
1
s
input high-/low-
P40 to P47
1.8 V
≤ VDD < 2.7 V
2
s
level width
RESET
tRSL
2.7 V
≤ VDD ≤ 5.5 V
10
s
low-level width
1.8 V
≤ VDD < 2.7 V
20
s
Notes 1. Value when the external clock is used. When a crystal resonator is used, it is 114
s (MIN.).
2. Selection of fsam = fX, fX/4, fX/64 is possible using bits 0 and 1 (PRM00, PRM01) of prescaler mode register
0 (PRM0). However, if the TI00 valid edge is selected as the count clock, the value becomes fsam = fX/8.
1.8 V
≤ VDD < 2.7 V
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