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參數(shù)資料
| 型號： | UPD750066CU(A)-XXX |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-42 |
| 文件頁數(shù)： | 52/83頁 |
| 文件大?。?/td> | 730K |
| 代理商： | UPD750066CU(A)-XXX |
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PD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
56
Data Sheet U10165EJ2V1DS
Main System Clock Oscillator Characteristics (TA = –40 to +85C, VDD = 1.8 to 5.5 V)
Resonator
Recommended
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Constants
Ceramic
Oscillation frequency
1.0
6.0Note 2
MHz
resonator
(fX)Note 1
Oscillation
After VDD reaches
4
ms
stabilization timeNote 3
oscillation voltage
range MIN. value
Crystal
Oscillation frequency
1.0
6.0Note 2
MHz
resonator
(fX)Note 1
Oscillation
VDD = 4.5 to 5.5 V
10
ms
stabilization timeNote 3
30
External
X1 input frequency
1.0
6.0Note 2
MHz
clock
(fX)Note 1
X1 input high-/
83.3
500
ns
low-level width
(tXH, tXL)
Notes 1.
The oscillation frequency and X1 input frequency shown above indicate only oscillator characteristics.
Refer to AC Characteristics for instruction execution time.
2.
If the oscillation frequency is 4.19 MHz < fX
≤ 6.0 MHz at 1.8 V ≤ VDD < 2.7 V, do not select the processor
clock control register (PCC) = 0011. If PCC = 0011, one machine cycle time is less than 0.95
s, falling
short of the rated value of 0.95
s.
3.
The oscillation stabilization time is the time required to stabilize oscillation after VDD has been applied
or STOP mode has been released.
Caution When using the main system clock oscillator, wire as follows in the area enclosed by the broken
lines in the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as VSS.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
X1
X2
X1
X2
C1
C2
X1
X2
C1
C2
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