參數(shù)資料
型號： UPD750066CU(A)-XXX
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDIP42
封裝： 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-42
文件頁數(shù)： 47/83頁
文件大?。?/td> 730K
代理商： UPD750066CU(A)-XXX
51
PD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
Data Sheet U10165EJ2V1DS
Instruction
Number
Addressing
Mnemonic
Operand
of Machine
Operation
Skip Condition
Group
of Bytes
Cycles
Area
Subroutine
CALLNote
!addr
3
PD750064
*6
stack control
(SP–3)
← MBE, RBE, 0, 0
(SP–4) (SP–1) (SP–2)
← PC11–0
PC11–0
← addr, SP ← SP–4
PD750066, 750068
(SP–3)
← MBE, RBE, 0, PC12
(SP–4) (SP–1) (SP–2)
← PC11–0
PC12–0
← addr, SP ← SP–4
4
PD750064
(SP–2)
← ×, ×, MBE, RBE
(SP–6) (SP–3) (SP–4)
← PC11–0
(SP–5)
← 0, 0, 0, 0
PC11–0
← addr, SP ← SP–6
PD750066, 750068
(SP–2)
← ×, ×, MBE, RBE
(SP–6) (SP–3) (SP–4)
← PC11–0
(SP–5)
← 0, 0, 0, PC12
PC12–0
← addr, SP ← SP–6
CALLFNote
!faddr
2
PD750064
*9
(SP–3)
← MBE, RBE, 0, 0
(SP–4) (SP–1) (SP–2)
← PC11–0
PC11–0
← 0+faddr, SP ← SP–4
PD750066, 750068
(SP–3)
← MBE, RBE, 0, PC12
(SP–4) (SP–1) (SP–2)
← PC11–0
PC12–0
← 00+faddr, SP ← SP–4
3
PD750064
(SP–2)
← ×, ×, MBE, RBE
(SP–6) (SP–3) (SP–4)
← PC11–0
(SP–5)
← 0, 0, 0, 0
PC11–0
← 0+faddr, SP ← SP–6
PD750066, 750068
(SP–2)
← ×, ×, MBE, RBE
(SP–6) (SP–3) (SP–4)
← PC11–0
(SP–5)
← 0, 0, 0, PC12
PC12–0
← 00+faddr, SP ← SP–6
Note
The operations indicated with thick lines can be performed only in the Mk II mode. The other operations
can be performed only in the Mk I mode.
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