
CHAPTER 3 CPU FUNCTIONS
User’s Manual U16890EJ1V0UD
63
3.3 Operating Modes
The V850ES/KG1 has the following operating modes.
(1) Normal operating mode
After the system has been released from the reset state, the pins related to the bus interface are set to the port
mode, execution branches to the reset entry address of the internal ROM, and instruction processing is started.
(2) Flash memory programming mode
This mode is valid only in flash memory versions (
μ
PD70F3214, 70F3214Y, 70F3214H, 70F3214HY,
70F3215H, and 70F3215HY).
When this mode is specified, the internal flash memory can be programmed by using a flash programmer.
(a) Specifying operating mode
(i)
μ
PD70F3214, 70F3214Y
The internal flash memory can be written or erased when 10 V
±
0.3 V is applied to the V
PP
pin.
V
PP
Operating Mode
0
Normal operating mode
10 V
±
0.3 V
Flash memory programming mode
V
DD
Setting prohibited
(ii)
μ
PD70F3214H, 70F3214HY, 70F3215H, 70F3215HY
The operating mode is specified according to the status (input level) of the FLMD0 and FLMD1 pins.
In the normal operating mode, input a low level to the FLMD0 pin during the reset period.
A high level is input to the FLMD0 pin by the flash programmer in the flash memory programming
mode if a flash programmer is connected. In the self-programming mode, input a high level to this
pin from an external circuit.
Fix the specification of these pins in the application system and do not change the setting of these
pins during operation.
FLMD0
FLMD1
Operating Mode
L
×
Normal operating mode
H
L
Flash memory programming mode
H
H
Setting prohibited
Remark
H: High level
L: Low level
×
: don’t care