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型號：	UPD70F3116GJ-UEN-A
廠商：	NEC Corp.
英文描述：	32-Bit Single-Chip Microcontrollers
中文描述：	32位單芯片微控制器
文件頁數(shù)：	441/826頁
文件大?。?/td>	3455K
代理商：	UPD70F3116GJ-UEN-A

CHAPTER 10 SERIAL INTERFACE FUNCTION

User’s Manual U14492EJ5V0UD

(5) Transfer rate during continuous transmission

During continuous transmission, the transfer rate from a stop bit to the next start bit is extended two clocks of

base clock longer than normal. However, on the reception side, the transfer result is not affected since the

timing is initialized by the detection of the start bit.

Figure 10-14. Transfer Rate During Continuous Transmission

1 data frame

Start bit of

Representing the 1-bit data length by FL, the stop bit length by FLstp, and the base clock frequency by f

yields the following equation.

FLstp = FL + 2/f

Therefore, the transfer rate during continuous transmission is as follows (when stop bit length = 1).

Transfer rate = 11

10.2.7 Precautions

Precautions to be observed when using UART0 are shown below.

(1) When the supply of clocks to UART0 is stopped (for example, IDLE or software STOP mode), operation stops

with each register retaining the value it had immediately before the supply of clocks was stopped. The TXD0

pin output also holds and outputs the value it had immediately before the supply of clocks was stopped.

However, operation is not guaranteed after the supply of clocks is restarted. Therefore, after the supply of

clocks is restarted, the circuits should be initialized by setting UARTCAE0 bit = 0, RXE0 bit = 0, and TXE0 bit =

0 in the ASIM0 register.

(2) UART0 has a 2-stage buffer configuration consisting of transmit buffer register 0 (TXB0) and the transmit shift

If the TXBF0 and TXSF0 bits are read in continuous transmission simultaneously, the values change from 10

01. Thus, judge the timing for writing the next data to the TXB0 register by reading only the TXBF0 bit

during continuous transmission.

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