參數(shù)資料
型號： TVP5160PNPG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 顏色信號轉(zhuǎn)換
英文描述： COLOR SIGNAL DECODER, PQFP128
封裝： PLASTIC, HTQFP-128
文件頁數(shù)： 94/119頁
文件大小： 1347K
代理商： TVP5160PNPG4
Internal Control Registers
66
February 2005 Revised April 2006
SLES135A
4.1.74
F- and V-Bit Decode Control
Subaddress
69h
Default
00h
7
6
5
4
3
2
1
0
VPLL
Adaptive
Reserved
F-Mode[1:0]
F-bit control mode :
00 = Auto: If lines per frame is standard decode F and V bits as per 656 standard from line count else
decode F bit from vsync input and set V bit = 0b
01 = Decode F and V bits from input syncs
10 = Reserved
11 = Always decode F and V bits from line count (TVP5146 compatible)
This register is used in conjunction with register 75h as indicated below:
REGISTER 69H
REGISTER 75H
MODE
STANDARD LPF
NONSTANDARD LPF
BIT 1
BIT 0
BIT 3
BIT 2
MODE
F
V
F
V
0
Reserved
0
1
TVP5160
656
Toggle
Switch9
0
1
0
TVP5160
656
Pulse
0
1
Reserved
0
1
0
Reserved
0
1
0
1
656
Toggle
Switch9
0
1
0
656
Pulse
0
1
Reserved
1
0
Reserved
1
0
1
Reserved
1
0
1
0
Reserved
1
0
1
Reserved
1
0
TVP5146
656
Even = 1
Odd = toggle
Switch
1
0
1
TVP5146
656
Toggle
Switch
1
0
TVP5146
656
Pulse
Switch
1
Reserved
656 = ITU-R BT.656 standard
Toggle = Toggles from field to field
Pulse = Pulses low for 1 line prior to field transition
Switch = V bit switches high before the F-bit transition and low after the F bit transition
Switch9 = V bit switches high 1 line prior to the F-bit transition, then low after 9 lines
Reserved = Not used
Adaptive
0 = Enable F- and V-bit adaptation to detected lines per frame
1 = Disable F- and V-bit adaptation to detected lines per frame
VPLL time constant control:
0 = VPLL adapts time constants to input signal
1 = VPLL time constants fixed
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