參數(shù)資料
型號： TVP5160PNPG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 顏色信號轉換
英文描述： COLOR SIGNAL DECODER, PQFP128
封裝： PLASTIC, HTQFP-128
文件頁數(shù)： 51/119頁
文件大?。?/td> 1347K
代理商： TVP5160PNPG4
Functional Description
27
February 2005 Revised April 2006
SLES135A
DID:
91h: Sliced data of VBI lines of first field
53h: Sliced data of line 24 to end of first field
55h: Sliced data of VBI lines of second field
97h: Sliced data of line 24 to end of second field
SDID:
This field holds the data format taken from the line mode register bits [5:0] of the corresponding
line.
NN:
Number of Dwords beginning with byte 8 through 4N+7. Note this value is the number of Dwords
where each Dword is 4 bytes.
IDID0:
Transaction video line number [7:0]
IDID1:
Bit 0/1 – Transaction video line number [9:8]
Bit 2 – Match 2 flag
Bit 3 – Match 1 flag
Bit 4 – 1b if at least one error was detected in the EDC block. 0b if no error was detected.
CS:
Sum of Y7Y0 of byte 8 through byte 4N+5. For teletext modes, byte 8 is the sync pattern byte.
Byte 9 is Sample 1.
Fill byte: Fill byte makes a multiple of 4 bytes from byte zero to last fill byte
3.10.2
VBI Raw Data Out
The TVP5160 decoder can output raw A/D video data at twice the sampling rate for external VBI slicing. This
is transmitted as an ancillary data block, although a bit differently from the way the sliced VBI data is
transmitted in the FIFO format as described in Section 3.10.1. The samples are transmitted during the active
portion of the line. VBI raw data uses ITU-R BT 656 format having only luma data. The chroma samples are
replaced by luma samples. The TVP5160 decoder inserts a 4-byte preamble 000h 3FFh 3FFh 180h before
data start. There is no checksum byte or fill bytes in this mode.
DATA NO. Y9 (MSB)
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0 (LSB)
DESCRIPTION
0
VBI raw data preamble
1
2
1
3
0
1
0
4
Sample 1
2x pixel rate
Luma data
(i.e., NTSC 601: n = 1707)
5
Sample 2
:
n1
Sample n5
N
Sample n4
3.11 Powerup, Reset, and Initialization
No specific power-up sequence is required, but all power supplies must be active and stable within 500 ms
of each other. Reset may be low during power-up, but must remain low for at least 1 s after the power supplies
become stable and the crystal begins to oscillate. Alternately, reset may be asserted any time after power up
and a stable crystal oscillation, and must remain asserted for at least 1 s. Table 310 describes the status
of the TVP5160 terminals during and immediately after reset.
200 s must be allowed after reset before commencing I2C operations if the SCL pin is not monitored during
I2C operations.
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