參數(shù)資料
型號(hào): TPU3035PK
元件分類: 圖文
英文描述: TELETEXT DECODER, PDIP40
封裝: PLASTIC, DIP-40
文件頁(yè)數(shù): 49/72頁(yè)
文件大?。?/td> 347K
代理商: TPU3035PK
TPU 3035, TPU 3040, TPU 3050
PRELIMINARY DATA SHEET
53
Micronas
4.16. I/O Page Register
Note:
For compatibility reasons, every undefined bit of a write register should be set to ‘0’. Undefined bits of a read
register should be treated as “don’t care”.
0200 H
R/W
CONTROL REGISTER
Bit
Reset
Function
all
00 H
During reset the control register is loaded with the contents of the address FFF9H, but it can be read and
written via software.
7
0
1 = CPU disable
0 = CPU enable
6
0
1 = program RAM disable
0 = program RAM enable
5
0
1 = program ROM disable
0 = program ROM enable
4
0
1 = character ROM disable
0 = character ROM enable
3
0
1 = DMA interface disable
0 = DMA interface enable
2
0
1 = I/O page disable
0 = I/O page enable
1
0
1 = test mode on
0 = test mode off
0
write:
1 = burnin test mode (only if test pin high)
read:
1 = burnin test mode
0 = normal test mode
0202 H
Write
STANDBY
Bit
Reset
Function
2
0
1 = digital circuitry power off
(CPU still active with slow clock)
0 = digital circuitry power on
1
0
1 = analog circuitry power off
0 = analog circuitry power on
0
1 = character ROM power off
0 = character ROM power on
0203 H
Write
WATCHDOG
Bit
Reset
Function
all
6C H
reset watchdog if 8-bit value= 0x6c is written into this register
all other values or time out will reset the chip
相關(guān)PDF資料
PDF描述
TPU3035PO TELETEXT DECODER, PDIP52
TPU3035PQ TELETEXT DECODER, PQCC44
TPU3050PK TELETEXT DECODER, PDIP40
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TPU3050PQ TELETEXT DECODER, PQCC44
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