PRELIMINARY DATA SHEET
TPU 3035, TPU 3040, TPU 3050
48
Micronas
4.12. Page Table
The memory management is based on a fixed size page
table, which has entries for every hexadecimal page
number from 100 to 8FF. The page table starts with page
800 and contains a 2-byte page pointer for every page.
The page table can be read with the command
READ_PAGE_INFO sending the page number and
reading the 2-byte page pointer containing:
– DRAM pointer
– cycle flag
– memory flag
– subpage flag
– update flag
– protection flag
The DRAM pointer gives the location where the page is
stored in memory. The page size is fixed to 1 KByte, only
ghost rows are allocated dynamically.
The cycle flag will be set as soon as this page is detected
in the transmission cycle even if it cannot be stored in
memory. Only if the page is really stored in memory, the
memory flag will be set. The subpage flag will be set for
every page in cycle if the page subcode is different from
0000H or 3F7FH. The update flag is set every time a
page is stored and will be reset only for the display page
after updating the display memory. A page with protec-
tion flag set will never be removed from memory.
The memory manager uses page priorities to decide
which pages should be stored or removed from memory.
If no more memory is available, pages with lowest prior-
ity are removed automatically and the higher priority
pages are stored at their place. By setting the page prior-
ity the programmer has control over the memory man-
agement.
The page table is fully controlled by the memory manag-
er and should never be written by external software. To
change
the
page
table
flags
the
command
CHANGE_PAGE_INFO can be used.
Table 4–21: Page Table Format
Index
2-byte Page Pointer
000
start magazine 8
001
...
100
Cycle
Flag
Memory
Flag
Subpage
Flag
11-bit DRAM Pointer
Update
Flag
Protect
Flag
...
1F0
hexadecimal pages (e.g. TOP)
...
7FE
7FF
end magazine 7