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參數(shù)資料
| 型號： | TP3076J |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 編解碼器 |
| 英文描述： | COMBO II Programmable PCM CODEC/Filter for ISDN and Digital Phone Applications |
| 中文描述： | A/MU-LAW, PROGRAMMABLE CODEC, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 222K |
| 代理商： | TP3076J |
Programmable Functions
(Continued)
Coding Law Selection
Bits “MA” and “IA” in Table 2 permit the selection of μ255
coding or A-law coding, with or without even bit inversion.
Analog Loopback
Analog Loopback mode is entered by setting the “AL” and
“DL” bits in the Control Register as shown in Table 2 In the
analog loopback mode, the Transmit input VF
I is isolated
from the input pin and internally connected to the VF
O out-
put, forming a loop from the Receive PCM Register back to
the Transmit PCM Register. The VF
O pin remains active,
and the programmed settings of the Transmit and Receive
gains remain unchanged, thus care must be taken to ensure
that overload levels are not exceeded anywhere in the loop.
Digital Loopback
Digital Loopback mode is entered by setting the “AL” and
“DL” bits in the Control Register as shown in Table 2 This
mode provides another stage of path verification by enabling
data written into the Receive PCM Register to be read back
from that register in any Transmit time-slot at D
1. PCM de-
coding continues and analog output appears at VF
0. The
output can be disabled by programming ‘No Output’ in the
Receive Gain Register (see Table 8).
INTERFACE LATCH DIRECTIONS
Immediately following power-on, all Interface Latches as-
sume they are inputs, and therefore all IL pins are in a high
impedance state. Each IL pin may be individually pro-
grammed as a logic input or output by writing the appropriate
instruction to the LDR, see Table 1 and Table 3 For mini-
mum power dissipation, unconnected latch pins should be
programmed as outputs. For the TP3076, bits 2 and 3 should
always be programmed as “1” (outputs).
Bits L
–L
must be set by writing the specific instruction to
the LDR with the L bits in the second byte set as follows:
TABLE 3. Byte 2 Functions of Latch Direction Register
Byte 2 Bit Number
4
L
3
7
L
0
6
L
1
5
L
2
3
1
2
1
1
X
0
X
L
n
Bit
0
1
IL Direction
Input
Output
X = Don’t Care
INTERFACE LATCH STATES
Interface Latches configured as outputs assume the state
determined by the appropriate data bit in the 2-byte instruc-
tion written to the Interface Latch Register (ILR) as shown in
Table 1 and Table 4 Latches configured as inputs will sense
the state applied by an external source, such as the
Off-Hook detect output of a SLIC. All bits of the ILR, i.e.
sensed inputs and the programmed state of outputs, can be
read back in the 2nd byte of a READ from the ILR.
It is recommended that during initialization, the state of IL
pins to be configured as outputs should be programmed first
followed immediately by the Latch Direction Register.
TABLE 4. Interface Latch Data Bit Order
Bit Number
4
D
3
7
6
5
3
2
1
X
0
X
D
0
D
1
D
2
D
4
D
5
TABLE 5. Coding Law Conventions
μ255 Law
True A-Law with
Even Bit Inversion
MSB
1 0 1 0 1 0 1 0
1 1 0 1 0 1 0 1
0 1 0 1 0 1 0 1
0 0 1 0 1 0 1 0
A-Law without
Even Bit Inversion
MSB
1 1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1 1
MSB
1 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0
LSB
LSB
LSB
V
IN
= +Full Scale
V
IN
= 0V
V
IN
= Full Scale
Note 5:
The MSB is always the first PCM bit shifted in or out of COMBO II.
www.national.com
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| TP3076N-G/NOPB | 功能描述:IC INTERFACE PCM COMBO II 20-DIP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:COMBO®II 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
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| TP309 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| TP3094 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Quad PCM Codec/Filter |
| TP3094V | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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