參數(shù)資料
型號： TMX320F2812ZHHS
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： TMS320R2811, TMS320R2812 Digital Signal Processors
中文描述： TMS320R2811，TMS320R2812數(shù)字信號處理器
文件頁數(shù)： 59/147頁
文件大?。?/td> 2021K
代理商： TMX320F2812ZHHS
Peripherals
59
June 2004
SPRS257
Result Registers
EVB
S/W
ADCSOC
EVA
S/W
Sequencer 2
Sequencer 1
SOC
SOC
ADC Control Registers
70B7h
70B0h
70AFh
70A8h
Result Reg 15
Result Reg 8
Result Reg 7
Result Reg 1
Result Reg 0
Module
ADC
12-Bit
Analog
MUX
ADCINA0
ADCINA7
ADCINB0
ADCINB7
System
Control Block
High-Speed
Prescaler
HSPCLK
ADCENCLK
C28x
SYSCLKOUT
S/H
S/H
Figure 4
4. Block Diagram of the R281x ADC Module
To obtain the specified accuracy of the ADC, proper board layout is very critical. To the best extent possible,
traces leading to the ADCIN pins should not run in close proximity to the digital signal paths. This is to minimize
switching noise on the digital lines from getting coupled to the ADC inputs. Furthermore, proper isolation
techniques must be used to isolate the ADC module power pins (V
DDA1
/V
DDA2
, AV
DDREFBG
) from the digital
supply. Figure 4
5 shows the ADC pin connections for R281x devices.
Notes:
1.
The ADC registers are accessed at the SYSCLKOUT rate. The internal timing of the ADC module is
controlled by the high-speed peripheral clock (HSPCLK).
2.
The behavior of the ADC module based on the state of the ADCENCLK and HALT signals is as follows:
ADCENCLK:
On reset, this signal will be low. While reset is active-low (XRS) the clock to the register will
still function. This is necessary to make sure all registers and modes go into their default reset state. The
analog module will however be in a low-power inactive state. As soon as reset goes high, then the clock to
the registers will be disabled. When the user sets the ADCENCLK signal high, then the clocks to the
registers will be enabled and the analog module will be enabled. There will be a certain time delay (ms
range) before the ADC is stable and can be used.
HALT:
This signal only affects the analog module. It does not affect the registers. If low, the ADC module is
powered. If high, the ADC module goes into low-power mode. The HALT mode will stop the clock to the
CPU, which will stop the HSPCLK. Therefore the ADC register logic will be turned off indirectly.
Figure 4
5 shows the ADC pin-biasing for internal reference and Figure 4
6 shows the ADC pin-biasing for
external reference.
A
相關(guān)PDF資料
PDF描述
TMX320R2811PBKA TMS320R2811, TMS320R2812 Digital Signal Processors
TMR320C2812PGFA TMS320R2811, TMS320R2812 Digital Signal Processors
TMR320F2811PBKA TMS320R2811, TMS320R2812 Digital Signal Processors
TMR320F2811PGFA TMS320R2811, TMS320R2812 Digital Signal Processors
TMR320F2811ZHHS TMS320R2811, TMS320R2812 Digital Signal Processors
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMX320F28232ZHHA 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Controllers (DSCs)
TMX320F28232ZJZA 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Controllers (DSCs)
TMX320F28234ZHHA 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Controllers (DSCs)
TMX320F28234ZJZA 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Controllers (DSCs)
TMX320F28235PGFA 功能描述:IC FLOATING POINT DSP 176-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:TMS320F28x3x Delfino™, C2000™ 產(chǎn)品培訓(xùn)模塊:Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio 標(biāo)準(zhǔn)包裝:42 系列:PIC® 16C 核心處理器:PIC 芯體尺寸:8-位 速度:20MHz 連通性:- 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):13 程序存儲器容量:3.5KB（2K x 14） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:128 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 4x8b 振蕩器型:外部 工作溫度:-40°C ~ 85°C 封裝/外殼:18-SOIC（0.295"，7.50mm 寬） 包裝:管件 配用:XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MILISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING309-1011-ND - ADAPTER 18-SOIC TO 18-DIP309-1010-ND - ADAPTER 18-SOIC TO 18-DIPAC164010-ND - MODULE SKT PROMATEII DIP/SOIC
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*