參數(shù)資料
型號： TMX320DM648ZUT900
廠商： Texas Instruments, Inc.
英文描述： Digital Media Processor
中文描述： 數(shù)字媒體處理器
文件頁數(shù)： 42/166頁
文件大?。?/td> 1341K
代理商： TMX320DM648ZUT900
www.ti.com
P
3.2.6
PINMUX Register
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Writes to these registers are locked/blocked by default. To enable writes to these registers, write
0xADDDECAF to the KEY_REG. After enabling writes to protected registers by doing the above, the
register writes should occur within 10000 CPU/6 cycles, after which the key will be reset.
Figure 3-5. KEY_REG
31
0
KEY_REG
W-0x00000000
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
All pin multiplexing options are controlled by software via PINMUX register (except the ones mentioned in
Table 3-7
, whose default is selected by configuration pins). This PINMUX register reside within the system
module portion of the CFG bus memory map. The format of the registers and a description of the pins
they control are in the following sections.
The PINMux Register controls all the software-controlled pin muxing. The register format is shown in
Figure 3-6
. A brief description of each field is shown in
Table 3-6
.
Figure 3-6. PINMUX Register
31
22
21
GPIO_EN
20
19
Reserved
18
17
16
Reserved
VPI_EN
R-0000 0000 00
R/W-00
R-00
R/W-00
15
VP34_EN
14
13
12
11
Reserved
10
9
8
7
Reserved
6
5
4
3
1
0
SPI_UART_EN
MCASP_EN
VLYNQ_EN
Reserved
TIMER
_EN
R/W-00
R/W-00
R-00
R/W-00
R-00
R/W-00
R-000
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Table 3-6. PINMUX Register Field Descriptions
Bit
31:22
21:20
Field
Reserved
GPIO_EN
Value
Description
Reserved
Controls the pin muxing between Video Port 0 and the GPIO[12:15]
UNMUXED
(1)
UNMUXED
(2)
.VP0D16-19
VP0D02-09/CLK/CTL
3-state
3-state
Enable
3-state
Reserved
SECONDARY MUXED
(3)
VP0D12-15
3-state
3-state
VP0D12-15
GP12-15
GP12-15
00
01
10
11
3-state
3-state
Enable
Enable
19:18
Reserved
(1)
(2)
(3)
The complete list of pins: U20, U21, U22, R18.
The complete list of pins: Y23, V23, Y22, V22, U23, W20, V18, U18, V19, W21, T18, U19, V20.
The complete list of pins: V21, T19, T20, T21.
Device Configuration
42
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