- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383961 > TMX320C6414TGLZ (Texas Instruments, Inc.) FIXED-POINT DIGITAL SIGNAL PROCESSORS PDF資料下載
參數(shù)資料
| 型號： | TMX320C6414TGLZ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 45/140頁 |
| 文件大?。?/td> | 2033K |
| 代理商： | TMX320C6414TGLZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁當(dāng)前第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁
SPRS226H NOVEMBER 2003 REVISED AUGUST 2005
45
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
SIGNAL
TYPE
IPD/
IPU
DESCRIPTION
NAME
NO.
HOST-PORT INTERFACE (HPI) [C64x] or PERIPHERAL COMPONENT INTERCONNECT (PCI) [C6415T or C6416T devices only]
(CONTINUED)
PCBE0
W3
I/O/Z
PCI command/byte enable 0 (
I/O/Z
). When PCI is disabled (PCI_EN = 0), this pin is tied-off.
For the C6414T device this pin is “Reserved (leave unconnected,
do not
connect to power or
ground).”
XSP_CS
AD1
O
IPD
PCI serial interface chip select (
O
). When PCI is disabled (PCI_EN = 0), this pin is tied-off.
For the C6414T device this pin is “Reserved (leave unconnected,
do not
connect to power or
ground).”
CLKX2/
XSP_CLK§
AC2
I/O/Z
IPD
McBSP2 transmit clock (
I/O/Z
) [default] or PCI serial interface clock (
O
).
DR2/XSP_DI§
AB3
I
IPU
McBSP2 receive data (
I
) [default] or PCI serial interface data in (
I
). In PCI mode, this pin is
connected to the output data pin of the serial PROM.
DX2/XSP_DO§
AA2
O/Z
IPU
McBSP2 transmit data (
O/Z
) [default] or PCI serial interface data out (
O
). In PCI mode, this pin
is connected to the input data pin of the serial PROM.
GP15/PRST§
GP14/PCLK§
GP13/PINTA§
GP12/PGNT§
GP11/PREQ§
GP10/PCBE3§
GP9/PIDSEL§
G3
General-purpose input/output (GPIO) 15 pin (
I/O/Z
) or PCI reset (
I
). No function at default.
GPIO 14 pin (
I/O/Z
) or PCI clock (
I
). No function at default.
GPIO 13 pin (
I/O/Z
) or PCI interrupt A (
O/Z
). No function at default.
GPIO 12 pin (
I/O/Z
) or PCI bus grant (
I
). No function at default.
GPIO 11 pin (
I/O/Z
) or PCI bus request (
O/Z
). No function at default.
GPIO 10 pin (
I/O/Z
) or PCI command/byte enable 3 (
I/O/Z
). No function at default.
GPIO 9 pin (
I/O/Z
) or PCI initialization device select (
I
). No function at default.
EMIFA (64-bit) CONTROL SIGNALS COMMON TO ALL TYPES OF MEMORY
||
O/Z
IPU
EMIFA memory space enables
O/Z
IPU
O/Z
IPU
F2
G4
J3
I/O/Z
F1
L2
M3
ACE3
L26
ACE2
K23
O/Z
IPU
ACE1
K24
Enabled by bits 28 through 31 of the word address
Only one pin is asserted during any external data access
ACE0
K25
ABE7
T23
O/Z
IPU
ABE6
T24
O/Z
IPU
ABE5
R25
O/Z
IPU
EMIFA byte-enable control
Decoded from the low-order address bits. The number of address bits or byte enables
used depends on the width of external memory.
Byte-write enables for most types of memory
Can be directly connected to SDRAM read and write mask signal (SDQM)
ABE4
R26
O/Z
IPU
ABE3
M25
O/Z
IPU
ABE2
M26
O/Z
IPU
ABE1
L23
O/Z
IPU
ABE0
L24
O/Z
IPU
APDT
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k
IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used.)
§For the C6415T and C6416T devices, these pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet.
The C6414T device does
not
support the PCI or UTOPIA peripherals; therefore, these muxed peripheral pins are standalone peripheral functions
for this device.
||These C64x
devices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is an EMIFA signal
whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of
discussion, the prefix “A” or “B” may be omitted from the signal name.
To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.
M22
O/Z
IPU
EMIFA peripheral data transfer, allows direct transfer between external peripherals
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMX320C6415TGLZ | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMXF28155 | 155/51 Mbits/s SONET/SDH(155/51 M位/秒 SONET/SDH) |
| TN28F001BX-T150 | 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| TN28F001BX-T90 | 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| TN28F001BX-B150 | 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMX320C6414TGLZ1 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6415CGLZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMX320C6415CGLZ300 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6415CGLZ5E0 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6415CGLZA300 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。