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參數(shù)資料
| 型號： | TMX320C6201 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processors(1600MIPS at 200MHz，8個(gè)功能單元并行操作的DSP) |
| 中文描述： | 數(shù)字信號處理器（1600MIPS在200MHz，8個(gè)功能單元并行操作的數(shù)字信號處理器） |
| 文件頁數(shù)： | 28/72頁 |
| 文件大?。?/td> | 1552K |
| 代理商： | TMX320C6201 |
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TMX320C6201
DIGITAL SIGNAL PROCESSOR
SPRS051B – JANUARY 1997 – REVISED JUNE 1997
28
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
start-up operation after reset
There are two methods by which the ‘C6201 can start operating following the deassertion of the RESET signal.
The state of signal DC11 (during reset) determines if the device starts direct program execution from external
address 0h or whether it first uses an internal DMA channel 0 to boot-load the internal program memory from
an external EPROM before commencing program execution from internal address 0h.
direct program execution
The value of 000b of DC(13–11) pins during reset causes the ‘320C6201 to start program execution directly from
memory starting at address 0h (location of the reset-service-fetch packet). Depending on the MAP_BOOT mode
used, address 0h falls inside or external to the chip. Typically MAP_BOOT mode 0 (pin DC1 low during reset)
is used to start execution from 32-bit external EPROM or SRAM that has been properly initialized by the host
during reset. Memory map 1 mode typically is not used with the TMX320C6201 for direct execution startup,
because there is no mechanism to initialize the internal program memory other than by the ‘C6x itself. The
production release is to feature an enhanced host-port interface with the capability to access internal-program
memory through one of the DMA channels.
8- Bit
Memory
0000 0003h
8-Bit
Memory
0000 0002h
8-Bit
Memory
0000 0001h
8-Bit
Memory
0000 0000h
CPU
Instruction Fetch
RESET
DC1 (Memory Map 0)
DC11 (Direct Program Execution)
DC12 (Direct Program Execution)
DC13 (Direct Program Execution)
Low to High
Transition
GND
GND
GND
GND
320C6201
Figure 13. Direct Program Execution After Reset
boot-loader start up
The value of 001b of DC(13–11) pins during reset causes the ’C6x DMA channel 0 to transfer a block of data
from the external memory space CE1 to internal-program memory starting at 0h. The size of the boot block is
determined by the state of pins DC(10–8) during reset (see Figure 14). Internal-program memory location at
address 0h of the memory map corresponds to the MAP_BOOT mode 1 (pin DC1 high during reset). The
TMX320C6201 does not support MAP_BOOT mode 0 for the boot-load startup. Upon the completion of the
DMA transfer, the processor starts executing the reset service fetch packet from internal-program memory
address 0h. Typically, the reset packet includes a branch instruction to jump over the other interrupt service fetch
packets (ISFPs) to the application boot-loader program. The boot loader then loads the internal data memory
with application-initialized data and loads another program block to some location in the external memory space
CE0 or CE2 before branching to the main program loop.
P
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