SPNS110E – AUGUST 2005 – REVISED MAY 2008 ................................................" />
參數(shù)資料
型號(hào)： TMS470R1A384PZQ
廠商： Texas Instruments
文件頁(yè)數(shù)： 17/62頁(yè)
文件大?。?/td> 0K
描述： IC RISC MCU 384K FLASH 100-LQFP
標(biāo)準(zhǔn)包裝： 90
系列： TMS470
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 48MHz
連通性： CAN，C2Slb，I²C，SCI，SPI
外圍設(shè)備： DMA，PWM，WDT
輸入/輸出數(shù)： 53
程序存儲(chǔ)器容量： 384KB（384K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 1.71 V ~ 2.05 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12x10b
振蕩器型： 外部
工作溫度： -40°C ~ 125°C
封裝/外殼： 100-LQFP
包裝： 管件
配用： 296-23003-ND - KIT DEV KICKSTART TMS470
MibADC
SPNS110E – AUGUST 2005 – REVISED MAY 2008 ......................................................................................................................................................... www.ti.com
The multi-buffered analog-to-digital converter (MibADC) accepts an analog signal and converts the signal to a
10-bit digital value.
The A384 MibADC module can function in two modes: compatibility mode, where its programmer's model is
compatible with the TMS470R1x ADC module and its digital results are stored in digital result registers; or in
buffered mode, where the digital result registers are replaced with three FIFO buffers, one for each conversion
group [event, group1 (G1), and group2 (G2)]. In buffered mode, the MibADC buffers can be serviced by
interrupts or by the DMA.
NOTE:
The MibADC on this device does not support the DMA.
MibADC Event Trigger Enhancements
The MibADC includes two major enhancements over the event-triggering capability of the TMS470R1x ADC.
Both group1 and the event group can be configured for event-triggered operation, providing up to two
event-triggered groups.
The trigger source and polarity can be selected individually for both group1 and the event group from the
options identified in Table 9.
Table 9. MibADC Event Hookup Configuration
SOURCE SELECT BITS FOR G1 OR EVENT
EVENT NO.
SIGNAL PIN NAME
(G1SRC[1:0] OR EVSRC[1:0])
EVENT1
00
ADEVT
EVENT2
01
HET18
EVENT3
10
Reserved
EVENT4
11
Reserved
For group1, these event-triggered selections are configured via the group1 source select bits (G1SRC[1:0]) in the
AD event source register (ADEVTSRC[5:4]). For the event group, these event-triggered selections are configured
via the event group source select bits (EVSRC[1:0]) in the AD event source register (ADEVTSRC[1:0]).
For more detailed functional information on the MibADC, see the TMS470R1x Multi-Buffered Analog-to-Digital
Converter (MibADC) Reference Guide (literature number SPNU206).
24
Copyright 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TMS470R1A384
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