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參數(shù)資料
| 型號： | TMS44100P |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES |
| 中文描述： | 4194304字1位動態(tài)隨機存取記憶體 |
| 文件頁數(shù)： | 11/25頁 |
| 文件大?。?/td> | 383K |
| 代理商： | TMS44100P |
TMS44100, TMS44100P, TMS46100, TMS46100P
4194304-WORD BY 1-BIT
DYNAMIC RANDOM-ACCESS MEMORIES
SMHS561A – MARCH 1995 – REVISED JUNE 1995
11
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
1.4 V
VCC = 3.3 V
CL = 100 pF
Output Under Test
Output Under Test
CL = 100 pF
(b) ALTERNATE LOAD CIRCUIT
(a) LOAD CIRCUIT
RL = 500
R1 = 1178
R2 = 868
Figure 2. Low-Voltage Load Circuits for Timing Parameters
See Note A
RAS
CAS
A0–A10
W
Q
tRC
Row
Column
Don’t Care
Don’t Care
Don’t Care
tRAS
tRP
tCSH
tT
tRCD
tRSH
tCRP
tCAS
tRAD
tASC
tRAL
tASR
tRCS
tCAH
tRRH
tRCH
tCAC
tOFF
tAA
tCLZ
tRAC
tCP
Hi-Z
tAR
tRAH
tCAL
Valid Data Out
NOTE A: Output can go from the high-impedance state to an invalid-data state prior to the specified access time.
Figure 3. Read-Cycle Timing
A
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