參數(shù)資料
型號: TMP86CH09NG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP32
封裝: 0.400 INCH, 1.78 MM PITCH, LEAD FREE, PLASTIC, SDIP-32
文件頁數(shù): 46/120頁
文件大小: 1743K
代理商: TMP86CH09NG
Page 20
2. Operational Description
2.2 System Clock Controller
TMP86FH09ANG
2.2.4.2 IDLE1/2 mode and SLEEP1/2 mode
IDLE1/2 and SLEEP1/2 modes are controlled by the system control register 2 (SYSCR2) and maskable
interrupts. The following status is maintained during these modes.
1. Operation of the CPU and watchdog timer (WDT) is halted. On-chip peripherals continue to
operate.
2. The data memory, CPU registers, program status word and port output latches are all held in the
status in effect before these modes were entered.
3. The program counter holds the address 2 ahead of the instruction which starts these modes.
Figure 2-10 IDLE1/2 and SLEEP1/2 Modes
Reset
Reset input
“0”
“1” (Interrupt release mode)
Yes
No
CPU and WDT are halted
Interrupt request
IMF
Interrupt processing
Normal
release mode
Yes
Starting IDLE1/2 and
SLEEP1/2 modes by
instruction
Execution of the instruc-
tion which follows the
IDLE1/2 and SLEEP1/2
modes start instruction
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