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11.4.2 MISO/MOSI pins................................................................................................................................. 117
11.4.3 SS pin ................................................................................................................................................. 117
11.5 SEI Transfer Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
11.5.1 CPHA (SECR register bit 2) = 0 format .............................................................................................. 118
11.5.2 CPHA = 1 format................................................................................................................................. 118
11.6 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
11.7 Interrupt Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
11.8 SEI System Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
11.8.1 Write collision error ............................................................................................................................. 121
11.8.2 Overflow error ..................................................................................................................................... 121
11.9 Bus Driver Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
12. 10-bit AD Converter (ADC)
12.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
12.2 Register configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Function
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
12.3.1 Software Start Mode ........................................................................................................................... 127
12.3.2 Repeat Mode ...................................................................................................................................... 127
Register Setting
................................................................................................................................ 128
12.4 STOP/SLOW Modes during AD Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
12.5 Analog Input Voltage and AD Conversion Result . . . . . . . . . . . . . . . . . . . . . . . 130
12.6 Precautions about AD Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
12.6.1 Analog input pin voltage range ........................................................................................................... 131
12.6.2 Analog input shared pins .................................................................................................................... 131
12.6.3 Noise Countermeasure....................................................................................................................... 131
13.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
13.2 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
14.1 Flash Memory Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
14.1.1 Flash Memory Command Sequence Execution Control (FLSCR<FLSMD>) ..................................... 136
14.1.2 Flash Memory Standby Control (FLSSTB<FSTB>)............................................................................ 136
14.2 Command Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
14.2.1 Byte Program...................................................................................................................................... 138
14.2.2 Sector Erase (4-kbyte Erase) ............................................................................................................. 138
14.2.3 Chip Erase (All Erase) ........................................................................................................................ 139
14.2.4 Product ID Entry ................................................................................................................................. 139
14.2.5 Product ID Exit.................................................................................................................................... 139
14.2.6 Read Protect....................................................................................................................................... 139
14.3 Toggle Bit (D6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
14.4 Access to the Flash Memory Area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
14.4.1 Flash Memory Control in the Serial PROM Mode............................................................................... 141
14.4.1.1 How to write to the flash memory by executing the control program in the RAM area (in the RAM loader mode within the
serial PROM mode)
14.4.2 Flash Memory Control in the MCU mode............................................................................................ 143
14.4.2.1 How to write to the flash memory by executing a user write control program in the RAM area (in the MCU mode)