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參數(shù)資料
| 型號： | TMP86CH09NG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP32 |
| 封裝： | 0.400 INCH, 1.78 MM PITCH, LEAD FREE, PLASTIC, SDIP-32 |
| 文件頁數(shù)： | 3/120頁 |
| 文件大小： | 1743K |
| 代理商： | TMP86CH09NG |
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Page 89
TMP86FH09ANG
9.3 Function
The TimerCounter 3 and 4 have the 8-bit timer, 8-bit event counter, 8-bit programmable divider output (PDO), 8-
bit pulse width modulation (PWM) output modes. The TimerCounter 3 and 4 (TC3, 4) are cascadable to form a 16-
bit timer. The 16-bit timer has the operating modes such as the 16-bit timer, 16-bit event counter, warm-up counter,
16-bit pulse width modulation (PWM) output and 16-bit programmable pulse generation (PPG) modes.
9.3.1 8-Bit Timer Mode (TC3 and 4)
In the timer mode, the up-counter counts up using the internal clock. When a match between the up-counter
and the timer register j (TTREGj) value is detected, an INTTCj interrupt is generated and the up-counter is
cleared. After being cleared, the up-counter restarts counting.
Note 1: In the timer mode, fix TCjCR<TFFj> to 0. If not fixed, the PDOj, PWMj and PPGj pins may output pulses.
Note 2: In the timer mode, do not change the TTREGj setting while the timer is running. Since TTREGj is not in the
shift register configuration in the timer mode, the new value programmed in TTREGj is in effect immediately
after the programming. Therefore, if TTREGi is changed while the timer is running, an expected operation
may not be obtained.
Note 3: j = 3, 4
Table 9-4 Source Clock for TimerCounter 3, 4 (Internal Clock)
Source Clock
Resolution
Repeated Cycle
NORMAL1/2, IDLE1/2 mode
SLOW1/2,
SLEEP1/2
mode
fc = 16 MHz
fs = 32.768 kHz
fc = 16 MHz
fs = 32.768 kHz
DV7CK = 0
DV7CK = 1
fc/211 [Hz]
fs/23 [Hz]
128
s244.14 s
32.6 ms
62.3 ms
fc/27
–8
s
–
2.0 ms
–
fc/25
–2
s
–
510
s–
fc/23
–
500 ns
–
127.5
s–
Example :Setting the timer mode with source clock fc/27 Hz and generating an interrupt 80
s later
(TimerCounter4, fc = 16.0 MHz)
LD
(TTREG4), 0AH
: Sets the timer register (80
s
÷27/fc = 0AH).
DI
SET
(EIRH). 3
: Enables INTTC4 interrupt.
EI
LD
(TC4CR), 00010000B
: Sets the operating cock to fc/27, and 8-bit timer mode.
LD
(TC4CR), 00011000B
: Starts TC4.
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