tw(INT) Interrupt Vector td(INT) Add" />
參數(shù)資料
型號: TMDXCNCD28069ISO
廠商: Texas Instruments
文件頁數(shù): 151/174頁
文件大?。?/td> 0K
描述: EVAL PICCOLO CONTROLCARD
標(biāo)準(zhǔn)包裝: 1
系列: TMS320F2806x, Piccolo™, C2000™
主要目的: 接口,RS232,GPIO
嵌入式: 是,MCU,32 位
已用 IC / 零件: TMS320F2806x
已供物品:
XINT1, XINT2, XINT3
tw(INT)
Interrupt Vector
td(INT)
Address bus
(internal)
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
5.8.1
External Interrupts
Table 5-13. External Interrupt Registers
NAME
ADDRESS
SIZE (x16)
DESCRIPTION
XINT1CR
0x00 7070
1
XINT1 configuration register
XINT2CR
0x00 7071
1
XINT2 configuration register
XINT3CR
0x00 7072
1
XINT3 configuration register
XINT1CTR
0x00 7078
1
XINT1 counter register
XINT2CTR
0x00 7079
1
XINT2 counter register
XINT3CTR
0x00 707A
1
XINT3 counter register
Each external interrupt can be enabled or disabled or qualified using positive, negative, or both positive
and negative edge. For more information, see the "Systems Control and Interrupts" chapter of the
TMS320x2806x Piccolo Technical Reference Manual (literature number SPRUH18).
5.8.1.1
External Interrupt Electrical Data/Timing
Table 5-14. External Interrupt Timing Requirements(1)
MIN
MAX
UNIT
tw(INT)
(2)
Pulse duration, INT input low/high
Synchronous
1tc(SCO)
cycles
With qualifier
1tc(SCO) + tw(IQSW)
cycles
(1)
For an explanation of the input qualifier parameters, see Table 5-69.
(2)
This timing is applicable to any GPIO pin configured for ADCSOC functionality.
Table 5-15. External Interrupt Switching Characteristics(1)
over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
MAX
UNIT
td(INT)
Delay time, INT low/high to interrupt-vector fetch
tw(IQSW) + 12tc(SCO)
cycles
(1)
For an explanation of the input qualifier parameters, see Table 5-69.
Figure 5-12. External Interrupt Timing
78
Peripheral and Electrical Specifications
Copyright 2010–2012, Texas Instruments Incorporated
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