參數(shù)資料
型號: TLC320AD80C
廠商: Texas Instruments, Inc.
英文描述: Audio Processor Subsystem
中文描述: 音頻處理器子系統(tǒng)
文件頁數(shù): 34/36頁
文件大?。?/td> 219K
代理商: TLC320AD80C
A–3
Table A–3. Control Register 02h
D7
0
D6
0
D5
D4
D3
D2
D1
D0
FUNCTION
50/15
μ
s (LRCLK = 48 kHz)
50/15
μ
s (LRCLK = 44.1 kHz)
50/15
μ
s (LRCLK = 32 kHz)
None
0
1
De-emphasis
De em hasis
mode
1
0
1
1
0
Wideband mux
output mute
Enabled
1
Disabled
0
Volume/mute
gating enabler
Zero crossing or time out
1
Zero crossing only
x
Reserved
x
Reserved
0
Reset
Normal mode
1
Clear DAC digital filter
0
Power down
with ext out
mute
Device enabled
1
Device powered down
The default value at reset is 00h.
Table A–4. Left Volume Control Register (Control Register 03h)
D7
0
D6
D5
D4
D3
D2
D1
D0
FUNCTION
Volume control
mode
Ganged left/right control on left
1
Independent left/right control
0
0
0
0
0
0
0
–90 dB (mute)
0
0
0
0
0
0
1
–62 dB
0
0
0
0
0
1
0
–61 dB
0
1
1
1
1
1
0
Left volume
control
–1 dB
0
1
1
1
1
1
1
0 dB
1
0
0
0
0
0
0
1 dB
1
0
0
0
1
0
1
6 dB
1
0
0
0
1
1
x
Reserved
1
1
1
1
x
x
x
Reserved
The default value at reset is 00h.
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