參數(shù)資料
型號(hào)： TLC320AD80C
廠商： Texas Instruments, Inc.
英文描述： Audio Processor Subsystem
中文描述： 音頻處理器子系統(tǒng)
文件頁(yè)數(shù)： 17/36頁(yè)
文件大?。?/td> 219K
代理商： TLC320AD80C
2–6
2.1.2.3
The TV baseband audio audio port (TV BASEBAND P, TV BASEBAND M) is a mono differential input. This
input feeds an internal a monaural decoder used to extract the mono (left and right) signal from the TV
baseband. The output of the monaural decoder is sent to the output multiplexer.
TV Audio Baseband Input
The monaural decoder is a differential, eighth-order switched-capacitor filter. Proper operation requires that
the master clock (MCLK 1 or MCLK 2) and control register settings correspond to a sample rate of 32 kHz.
These settings ensure the filter requirements for proper stopband rejection. The purpose of the filter is to
reject specific signals from the NTSC audio broadcast multiplex. The signals rejected include the 15.73425
kHz BTSC stereo pilot tone, left and right stereo subcarriers, SAP channel, Pro channel, and data channel
as allowed by the FCC.
A typical connection would connect this input to the output of a TV IF detector. Therefore, composite TV aural
baseband signal would be demodulated by the TV analog IF detector (without an MTS stereo decoder) and
then input to the TLC320AD80.
A passive single pole low-pass filter with a 3-dB bandwidth of 2.12 kHz should be connected to the TV
baseband differential input to provide the required 75
μ
s de-emphasis filter. This external filter also acts as
an anti-aliasing filter for the internal switched capacitor monaural decoder.
2.1.2.4
This stereo audio input (EXT INL, EXT INR) is primarily intended to receive the external stereo audio output
(EXT OUTL, EXT OUTR) of the TLC320AD80. However, the user has the option to connect additional
analog functions in between these ports. The input should be ac-coupled to remove dc offsets that may be
present in the incoming signal.
Volume and Balance External Analog Input
The input resistance of this port varies as a function of the volume control setting. The input resistance is
lowest (
≥
20 k
) when the volume control is at its maximum setting of 6 dB. The input resistance is reduced
to approximately 2 k
when the capacitor precharge mode is selected from control register 01h. The
capacitor precharge mode is provided to charge and discharge the external ac coupling capacitor quickly,
overriding the input resistance of the volume control setting.
2.1.2.5
The MUX IN1 and MUX IN2 signals are the analog inputs to an uncommitted wideband multiplexer. A typical
application would use this multiplexer to provide source selection for the input to a channel 3/4 RF modulator.
Wideband Multiplexer Analog Inputs
2.1.3
Changing the audio source selection between any two of the six audio inputs can produce an audible click
depending on the difference between the corresponding signal values at the time of switching. This
difference between signals could be as large as 2.8 V peak-to-peak which would produce a very loud audible
click. This audible click can be eliminated on the variable audio outputs (AUDIO RIGHT, AUDIO LEFT, and
AUDIO MONO) by using the zero crossing mute function in conjunction with source selection changes. This
procedure will not eliminate audible clicks on the fixed audio outputs (EXT OUTR, EXT OUTL) since the zero
crossing mute function is located in the volume control block.
Audio Source Selection Procedure
Prior to each audio source selection change, the audio output should be muted by writing 00h to volume
control register 03h. The output signal follows the currently selected audio input until the next zero crossing
occurs which activates the mute. After a recommended time delay of 4096 LRCLK cycles, the audio source
can be changed by writing to control register 01h. The capacitor precharge mode and the audio input port
mute should also be enabled by setting bit D1 to 1 and clearing bit D0 to 0 of control register 01h. After a
second recommended time delay of 512 LRCLK cycles, the precharge mode and audio input port mute
should be disabled and then the audio can be unmuted by restoring the original volume control setting to
control registers 03h and 04h. The output signal remains muted until the next zero crossing occurs and then
follows the newly selected audio input. The second delay time of 512 LRCLK cycles is required to allow
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TLC320AD81CDBT 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel
TLC320AD90 制造商:TI 制造商全稱:Texas Instruments 功能描述:Stereo Audio Codec
TLC320AD91 制造商:TI 制造商全稱:Texas Instruments 功能描述:Stereo Audio Codec
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