參數(shù)資料
型號: TLC320AD80C
廠商: Texas Instruments, Inc.
英文描述: Audio Processor Subsystem
中文描述: 音頻處理器子系統(tǒng)
文件頁數(shù): 32/36頁
文件大小: 219K
代理商: TLC320AD80C
A–1
Appendix A
Register Set
Control of the TLC320AD80 is accomplished by means of the SPI serial interface and the control registers
described in this section.
There are five control registers used to control the various functions of the device: volume control,
multiplexer selections, serial interface, modes of operation, etc.
Table A–1. Serial PCM Data Format Control Register (Control Register 00h)
D7
0
D6
0
D5
D4
D3
D2
D1
D0
FUNCTION
Philips I2S protocol
0
1
Serial PCM
data format
Right justified
1
0
Left justified
1
1
Left justified DSP (inverted BCLK)
0
Serial PCM
data precision
16 bits
1
18 bits
256 x LRCLK (22.05 kHz
LRCLK
48 kHz)
384 x LRCLK (22.05 kHz
LRCLK
48 kHz)
512 x LRCLK (8 kHz
LRCLK
16 kHz)
0
0
0
1
MCLK rate
1
0
1
1
Reserved
0
0
64 x LRCLK
0
1
Bit clock
(BCLK) rate
48 x LRCLK (384x mode only)
1
0
32 x LRCLK (16-bit mode only)
1
1
Reserved
x
Reserved
The default value at reset is 00h.
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