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參數(shù)資料
| 型號： | TLC2943DB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | HIGH-PERFORMANCE DUAL PHASE-LOCKED BUILDING BLOCK |
| 中文描述： | 高效能雙鎖相環(huán)積木 |
| 文件頁數(shù)： | 11/27頁 |
| 文件大?。?/td> | 425K |
| 代理商： | TLC2943DB |
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TLC2943
HIGH-PERFORMANCE DUAL PHASE-LOCKED BUILDING BLOCK
SLAS249 – NOVEMBER 1999
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
operating characteristics at V
DD
= 3 V, T
A
= 25
°
C (unless otherwise noted)
VCO section
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
f(OSC)
t(STB)
tr
tf
f(DUTY)
Oscillation frequency
RBIAS = 2.4 k
,
See Note 10
VCOIN = 1/2VDD
38
48
58
MHz
μ
s
ns
Time to stable oscillation
10
Output rise time
CL = 15 pF,
CL = 15 pF,
RBIAS = 2.4 k
,
RBIAS = 2.4 k
,
Top = –20
°
C to 75
°
C
RBIAS = 2.4 k
,
VDD = 2.85 V to 3.15 V
See Figure 5
3.3
10
Output fall time
See Figure 5
2
8
ns
Duty cycle
VCOIN = 1/2VDD
VCOIN = 1/2VDD
45%
50%
55%
f(TA)
Temperature coefficient of oscillation
frequency
0.03
%/
°
C
f(VDD)
Supply voltage coefficient of oscillation
frequency supply
VCOIN = 1.5 V,
0.04
%/mV
NOTE 10: The time period to the stable VCO oscillation frequency after the VCO INHIBIT terminal is changed to a low level.
PFD section
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
fMAX
tPLZ
tPHZ
tPZL
tPZH
tr
tf
Maximum operating frequency
30
MHz
PFD output disable time from low level
20
40
ns
PFD output disable time from high level
See Figure 6 and Figure 7 and Table 5
See Figure 6 and Figure 7, and Table 5
18
40
PFD output enable time to low level
4.1
18
ns
PFD output enable time to high level
4.8
18
Rise time
CL= 15 pF
CL = 15 pF,
See Figure 6
3.1
9
ns
Fall time
1.5
9
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