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參數(shù)資料
| 型號(hào)： | TL16PNP100APT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, QFP-48 |
| 文件頁(yè)數(shù)： | 1/21頁(yè) |
| 文件大?。?/td> | 304K |
| 代理商： | TL16PNP100APT |
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TL16PNP100A
STANDALONE PLUG-AND-PLAY (PnP) CONTROLLER
SLLS200C – MARCH 1995 – REVISED SEPTEMBER 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D PnP Card Autoconfiguration Sequence
Compliant
D Supports Two Logical Devices
D Decodes 10-Bit I/O Address Location With
Programmable 1-, 2-, 4-, 8-, 16-Byte Block
Size
D Maps Interrupts to Six Interrupt Outputs
IRQ3 – IRQ7 and IRQ9
D Provides Simple 3-Terminal Interface to
SGS-Thomson EEPROM 2K/4K ST93C56/66
or Equivalent
D 3-State Output EEPROM Interface Allows
the EEPROM to be Accessed by Another
Controller
D Provides Direct Connection to ISA/AT Bus
D Data and Interrupt Signals Require No
Buffer
D Available in 44-Pin Plastic Leaded Chip
Carrier (PLCC) and 48-Pin TQFP Package
description
The TL16PNP100A responds to the plug-and-
play
(PnP)
autoconfiguration
process.
The
process puts all PnP cards in a configuration
mode, isolates one PnP card at a time, assigns a
card-select number (CSN), and reads the card
resource-data structure from the ST93C56/66
EEPROM. After the resource requirements and
capabilities are determined for all cards, the
process uses the CSN to configure the card by
writing
to
the
configuration
registers.
The
TL16PNP100A implements configuration regis-
ters only for I/O applications with two logical
devices, and DMA application support is not
provided. Finally, the process activates the
TL16PNP100A
card
and
removes
it
from
configuration
mode.
After
the
configuration
process, the logic function can then start
responding to industry standard architecture
(ISA) bus cycles. The controller disables the
EEPROM interface after the configuration is
complete to allow another on-board controller to
access the EEPROM.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
A6
A7
A8
A9
A10
A11
GND
CLK
INTR0
CS0
EEPROM
39
38
37
36
35
34
33
32
31
30
29
18 19
7
8
9
10
11
12
13
14
15
16
17
D0
D1
D2
D3
GND
D4
D5
D6
D7
GND
IRQ3
20 21 22 23
FN PACKAGE
(TOP VIEW)
A2
A3
A4
A5
54
3 2
1
644
AEN
IOR
IOW
RESET
V
A0
A1
SCLK
SCS
SIO
IRQ4
IRQ5
IRQ6
IRQ7
IRQ9
INTR1
42 41 40
43
24 25 26 27 28
CC
V
CC
CS1
14 15
A6
A7
A8
A9
NC
A10
A11
GND
CLK
INTR0
CS0
EEPROM
36
35
34
33
32
31
30
29
28
27
26
25
16
1
2
3
4
5
6
7
8
9
10
11
12
D0
D1
D2
D3
GND
D4
NC
D5
D6
D7
GND
IRQ3
17 18 19 20
A1
A2
A3
A4
47 46 45 44 43
48
42
AEN
IOR
IOW
RESET
SCLK
SCS
SIO
IRQ6
IRQ9
NC
CS1
INTR1
40 39 38
41
21 22 23 24
37
13
A5
NC
A0
IRQ5
IRQ4
IRQ7
PT PACKAGE
(TOP VIEW)
NC – No internal connection
V
CC
V
CC
Copyright
1997, Texas Instruments Incorporated
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