參數(shù)資料
型號(hào)： THS1009IDARG4
廠商： Texas Instruments, Inc.
英文描述： 10-BIT, 2 ANALOG INPUT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER
中文描述： 10位，2個(gè)模擬輸入，8 MSPS的同步采樣模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù)： 23/31頁(yè)
文件大?。?/td> 235K
代理商： THS1009IDARG4
SLAS287A
–
AUGUST 2000
–
REVISED DECEMBER 2002
www.ti.com
23
Write Timing (using WR, WR-controlled)
Figure 30 shows the write-timing behavior when the WR(R/W) input is programmed as a write input WR only. The
input RD acts as the read input in this configuration. This timing is called WR-controlled because WR is the last
external signal of CS0, CS1, and WR which becomes valid.
90%
90%
10%
tsu
th
D(0
–
9)
DATA_AV
10%
óóóó
óóóó
tw(WR)
tsu(CS)
th(CS)
CS0
CS1
WR
RD
Figure 30. Write Timing Diagram Using WR (WR-controlled)
Write Timing Parameter Using WR (WR-controlled)
PARAMETER
MIN
TYP
MAX
UNIT
tsu(CS)
tsu
th
th(CS)
tw(WR)
Setup time, CS stable to last WR valid
0
ns
Setup time, data valid to first WR invalid
5
ns
Hold time, WR invalid to data invalid
2
ns
Hold time, WR invalid to CS change
5
ns
Pulse duration, WR active
10
ns
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