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參數(shù)資料
| 型號： | TDA9112A |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 偏轉 |
| 英文描述： | HORIZ/VERT DEFLECTION IC, PDIP32 |
| 封裝： | PLASTIC, SDIP-32 |
| 文件頁數(shù)： | 30/60頁 |
| 文件大?。?/td> | 831K |
| 代理商： | TDA9112A |
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Figure 5. Horizontal PLL1 block diagram
Figure 6. Horizontal oscillator (VCO) schematic diagram
9.3.3
Voltage controlled oscillator
The VCO makes part of both PLL1 and PLL2
loops, being an “output” to PLL1 and “input” to
PLL2. It delivers a linear sawtooth. Figure 6 ex-
plains its principle of operation. The linears are ob-
tained by charging and discharging an external ca-
pacitor on pin CO, with currents proportional to the
current forced through an external resistor on pin
RO
, which itself depends on the input tuning volt-
age VHO (filtered charge pump output). The rising
and falling linears are limited by VHOThrLo and
VHOThrHi
thresholds filtered through HOscF pin.
At no signal condition, the VHO tuning voltage is
clamped to its minimum (see section 6.4 - page
10), which corresponds to the free-running VCO
frequency fHO(0). Refer to subsection 9.3.1 for for-
mula to calculate this frequency using external
components values. The ratio between the fre-
quency corresponding to maximum VHO and the
one corresponding to minimum VHO (free-running
frequency) is about 4.5. This range can easily be
increased in the application. The PLL1 can only
lock to input frequencies falling inside these two
limits.
PLL
INHIBITION
SHAPER
Low
High
LOCK
COMP
CHARGE
PUMP
VCO
HOSC
(IC)
INPUT
INTERFACE
Sync
V-sync (extracted)
(IC)
DETECTOR
Polarity
V-sync
Extracted
REF1
(IC)
PLL1
HPLL1F RO CO HOscF
HPOS
HPosF
PLL1Pump
H/HVSyn
HLckVBk
Blank
HLock
PLL1InhEn
3
9
8
6
4
10
1
RS
Flip-Flop
4 I0
I0
2
I0
+
-
(PLL1 filter)
+
-
+
-
from charge pump
VCO discharge
control
HOscF
HPLL1F
CO
RO
VHO
VHOThrHi
VHOThrLo
VHOThrHi
VHOThrL
4
6
8
9
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