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參數(shù)資料
| 型號(hào)： | TDA9112A |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 偏轉(zhuǎn) |
| 英文描述： | HORIZ/VERT DEFLECTION IC, PDIP32 |
| 封裝： | PLASTIC, SDIP-32 |
| 文件頁(yè)數(shù)： | 11/60頁(yè) |
| 文件大小： | 831K |
| 代理商： | TDA9112A |
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Obsolete
Product(s)
- Obsolete
Product(s)
TDA9112A
19/60
6.8
DC/DC controller section
Note 55: A current sink is provided by the BComp output while BOut is disabled.
Note 56: Internal reference related to VRefO. The same values to be found on pin BRegIn, while regulation loop is
stabilized.
Note 57: Only applies to configuration specified in "Test conditions" column, i.e. synchronization of BOut “Off-to-On”
edge with horizontal fly-back signal. Refer to chapter "DC/DC controller" for more details.
Table 5. DC/DC controller section
(VCC = 12V, Tamb = 25°C)
Symbol
Parameter
Test Conditions
Value
Units
Min.
Typ.
Max.
RB+FB
Ext. resistance applied between
BComp output and BRegIn input
5k
AOLG
Open loop gain of error amplifier on
BRegIn input
Low frequency(19)
100
dB
fUGBW
Unity gain bandwidth of error amplifier
on BRegIn input
(19)
6MHz
IRI
Bias current delivered by BRegIn
-0.2
A
IBComp
Output current capability of BComp out-
put.
BOut enabled
BOut disabled(55)
-0.5
0.5
2.0
mA
ABISense
Voltage gain on BISense input
3
VThrBIsCurr
Threshold voltage on BISense input
corresponding to current limitation
ThrBlsense = 0
ThrBlsense = 1
TBD
2.1
1.2
V
IBISense
Bias current delivered by BISense
-1
A
tBOn
Conduction time of the power transistor
TH - 300ns
IBOut
Output current capability of BOut output
0
10
mA
VBOSat
Saturation voltage of the internal output
transistor on BOut
IBOut=10mA
0.25
V
VBReg
Regulation reference for BRegIn volt-
age(56)
VRefO=8V
BREF (Sad03h):
x0000000b
x1000000b
x1111111b
3.8
4.9
6.0
V
tBTrigDel
Delay of BOut “Off-to-On” edge after
middle of flyback pulse (57)
BOutPh = 0 and BO-
HEdge = 0
16
%
/TH
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