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參數(shù)資料
| 型號： | TDA1315H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Digital audio input/output circuit DAIO |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 文件頁數(shù)： | 7/36頁 |
| 文件大小： | 411K |
| 代理商： | TDA1315H |
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1995 Jul 17
7
Philips Semiconductors
Product specification
Digital audio input/output circuit (DAIO)
TDA1315H
FUNCTIONAL DESCRIPTION
Modes of operation
With respect to the control of the device and the exchange
of non-audio data, a microcontroller (host) mode and a
stand-alone mode can be considered. The selection of the
mode is performed at pin CTRLMODE.
In the stand-alone mode, the device configuration is solely
determined by pins. In the host mode an internal control
register, or pins or both can be used to change the default
settings.
With respect to the direction of the digital audio data, the
device can be operated in either a transmit or a receive
mode under control of a microcontroller. In the stand-alone
mode the device is only a receiver. In the receive mode the
input signal can also be made available at the output pin
IECO (feed-through) to ease the cascading of digital audio
equipment.
The device can be brought to standby mode at all times by
activating the PD pin (power down). In this mode all
functions are disabled, all outputs 3-stated, supply current
is minimized and the contents of the register are saved.
General
For those applications where it is important to save power,
the PD pin is provided, which, when activated, puts the
TDA1315H in standby mode by disabling all functions and
3-stating all outputs, while saving register contents.
As illustrated in Fig.1, the TDA1315H contains the
following major functional blocks:
IEC input section
Biphase demodulator
Frame and error detection
Clock and timing section
IEC output section
Biphase modulator
Audio section (I
2
S-bus transceiver)
Non-audio section (control and FIFO)
User (microcontroller) interface.
IEC
INPUT SECTION
There are two biphase signal inputs to the IEC input
section. IECIN0 accepts TTL levels from, for example, an
optical input device, while IECIN1 is designed for coaxial
cable inputs and requires signal levels of minimum
200 mV (p-p) via an external coupling capacitor. The
selection of the active input channel is performed by pin
IECSEL or by the control register or both. In the receive
mode, the selected input signal is applied internally to the
biphase audio output section to enable a feed-through
function.
B
IPHASE DEMODULATOR
In the biphase demodulator, the received signal (for details
see Chapter “References”[1] and [2]) is converted to
binary data and separated into audio and non-audio data
for further processing in their dedicated sections. The
demodulated input signal is also required for frame and
error detection.
F
RAME AND ERROR DETECTION
In the frame and error detection block, the framing
information from the received biphase signal is retrieved to
synchronize the biphase demodulator and to allow access
to the audio and non-audio data bits. An out-of-lock
condition of the PLL is flagged at UNLOCK. The validity of
audio samples is indicated at pin INVALID.
C
LOCK AND TIMING SECTION
In the clock and timing section, the timing information
inherent to the received biphase signal is retrieved and a
symmetrical master clock signal is generated and output at
pin SYSCLKO. Depending on the mode of operation, the
frequency of this master clock can be selected by pin
CLKSEL, by the control register or both to be either 256f
s
or 384f
s
(f
s
= audio sampling frequency). This section
contains all the circuitry of a Phase-Locked Loop (PLL),
except for the loop filter components, which are connected
externally to pins RC
int
and RC
fil
. When the input signal is
interrupted, the oscillator will slowly drift to the
centre frequency in order to keep the system operating on
a proper frequency. In the transmit mode, all required
timing signals are input at pin SYSCLKI and are derived
from an externally supplied system clock of either 256f
s
or
384f
s
. The input HIGH time of that clock may be in the
range between 30% to 70% of the clock period.
IEC
OUTPUT SECTION
In the IEC output section, either the received (feed-through
function) or the generated biphase signal is selected for
output at pin IECO, depending on the receive/transmit
mode. The output can be enabled/disabled by pin
IECOEN, by the control register or both, and can drive a
suitable optocoupler and a transformer in parallel.
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