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參數(shù)資料
| 型號： | TDA1315H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Digital audio input/output circuit DAIO |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 文件頁數(shù)： | 20/36頁 |
| 文件大?。?/td> | 411K |
| 代理商： | TDA1315H |
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1995 Jul 17
20
Philips Semiconductors
Product specification
Digital audio input/output circuit (DAIO)
TDA1315H
Status
The status register consists of two bytes. A description of
the status register bits is given in Tables 10 and 11. After
a reset all bits in the status register will be one.
The various error conditions of the TDA1315H are
reflected in bits 0 to 6 of the first byte. The error bits are set
(LOW) when the corresponding error conditions occur,
they are reset (HIGH) only after the register has been read
by the microcontroller. Bit 7 reflects the active
transmit/receive state. It is updated after the TDA1315H
configuration, as determined by bit 0 of the first control
register byte, has been changed. This allows verification of
the mode change to, for example, release a mute signal
after a successful change.
Table 10
First byte of status register
BIT
DESCRIPTION
FUNCTION
0
channel status mode
0 = professional
1 = consumer
0 = not locked
1 = locked
0 = error
1 = no error
0 = error
1 = no error
0 = error
1 = no error
0 = error
1 = no error
0 = change
1 = no change
0 = receive
1 = transmit
1
PLL lock condition
2
validity flag
3
parity check
4
biphase violation
5
user data overrun
6
channel status check
7
direction of data
Table 11
Second byte of status register
Note
1.
Bits 6 and 7 in the second byte of the status register
contain the inversion of bits 7 and 6, respectively, of
the channel status, which are used as mode bits.
Reset and standby mode
Figure 11 illustrates the timing for the toggling between
normal and standby mode.
In Figs 11 and 12, when activating PD or RESET, 0 ns can
be taken for t
ON:OSC
when the oscillator is running (e.g.
receive mode).
The TDA1315H uses its internal oscillator for the reset and
standby function. This means that it is not necessary, in
any mode, to apply a clock at the SYSCLKI input for the
TDA1315H to perform the reset or standby function.
For resetting the TDA1315H only a small pulse is
necessary at the RESET input. The device then
automatically starts the oscillator (in the event that it is not
running). The system will then do a synchronous reset
(internally) during approximately 3 internal clock periods.
This t
RESET
starts after the falling edge of RESET or when
the oscillator has started, whichever occurs last. Only
when this resetting has been accomplished will the
external pin programming (e.g. CLKSEL, I
2
SOEN etc.) be
read by the TDA1315H. The TDA1315H is then ready for
use.
BIT
DESCRIPTION
FUNCTION
0
audio mute
0 = enabled
1 = disabled
0 = enabled
1 = disabled
0 = TTL level
1 = high sensitivity
0 = enabled
1 = disabled
0 = SDAUX
1 = IEC or CD
0 = 384f
s
1 = 256f
s
0 = bit 7 set
1 = bit 7 reset
0 = bit 6 set
1 = bit 6 reset
1
IEC output enable
2
select IEC input
3
I
2
S-bus output enable
4
select I
2
S-bus source
5
select clock frequency
6
(1)
channel status (bit 7)
7
(1)
inverse mode bit (bit 6)
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