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參數(shù)資料
| 型號： | T7693 |
| 廠商： | Lineage Power |
| 英文描述： | 3.3 V T1/E1 Quad Line Interface( 3.3 V T1/E四線接口) |
| 中文描述： | 四3.3伏的T1/E1線路接口（3.3伏T1 /電子四線接口） |
| 文件頁數(shù)： | 20/42頁 |
| 文件大?。?/td> | 726K |
| 代理商： | T7693 |
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T7690 5.0 V T1/E1 Quad Line Interface
T7693 3.3 V T1/E1 Quad Line Interface
Data Sheet
May 1998
18
Lucent Technologies Inc.
Jitter Attenuator
The selectable jitter attenuator is provided for narrow-
bandwidth jitter transfer function applications. This
selection is done via control bits, which are global and
affect all four channels. One application is to provide
narrow-bandwidth jitter filtering for line-synchronization
in the receive path. Another use of the jitter attenuator
is to provide clock smoothing in the transmit signaling
path for applications such as synchronous/asynchro-
nous demultiplexers. In these applications, TCLK will
have an instantaneous frequency that is higher than
the data rate and periods of TCLK are suppressed
(gapped) in order to set the average long-term TCLK
frequency to within the transmit line rate specification.
The jitter attenuator does not degrade the jitter specifi-
cations of the receiver clock/data recovery circuit. In
addition, the jitter attenuator must meet the specifica-
tions for narrow-bandwidth applications as listed in
Table 10.
Data Delay
Providing narrow-bandwidth jitter filtering requires data
buffering to increase the data delay through the jitter
attenuator. The nominal data delay for the jitter attenua-
tor is 33 bit periods, with a maximum data delay of
66 bit periods. This delay is dependent on the input
clock frequency, XCLK frequency, input jitter, and
gapped clock patterns.
Generated (Intrinsic) Jitter
Generated jitter is the amount of jitter appearing on the
output port when the applied input signal has no jitter.
The jitter attenuator of this device outputs a maximum
of 0.04 UI peak-to-peak intrinsic jitter.
Jitter Transfer Function
The jitter transfer function describes the amount of jitter
in specific equipment that is transferred from the input
to the output over a frequency range. The jitter attenua-
tor exhibits a single-pole rolloff (20 dB/decade) jitter
transfer characteristic that has no peaking and a nomi-
nal filter corner frequency (3 dB bandwidth) for DS1
and CEPT operation of less than 10 Hz. For a given
frequency, different jitter amplitudes will cause slight
variations in attenuation because of finite quantization
effects. Jitter amplitudes of less than approximately
0.2 UI will have greater attenuation than the single-pole
rolloff characteristic.
Measurement of the jitter transfer function involves
stimulating the circuit with a sinusoidal jitter test signal.
The difference between the output signal power and
the test signal power, at a given frequency, is the jitter
transfer. When output signal power is below the noise
floor, it cannot be measured. Halting the jitter transfer
function measurements because of noise floor limita-
tions is acceptable during conformance testing.
Jitter Tolerance
The minimum jitter tolerance of the jitter attenuator
occurs when the XCLK frequency and the long-term
average frequency of the input clock are at their
extreme-frequency tolerances. The minimum tolerance
is 28 UI peak-to-peak at the highest jitter frequency of
15 kHz.
Jitter Attenuator Enable
The jitter attenuator is selected using the JAR and JAT
bits (register 5, bits 1 and 2) of the microprocessor
interface. These control bits are global and affect all
four channels unless a given channel is in the power-
down mode (PWRDN = 1). Because there is only one
attenuator function in the device, selection must be
made between either the transmit or receive path. If
both JAT and JAR are activated at the same time, the
jitter attenuator will be disabled. Note that the power
consumption increases slightly on a per-channel basis
when the jitter attenuator is active, as described in
Table 28. If jitter attenuation is selected, a valid XCLK
(pin 29) signal must be available.
Table 10. List of Low-Bandwidth Jitter
Specification Documents
Application
DS1
CEPT
TR-TSY-000009
TR-TSY-000253
TR-TSY-000499
ITU-T G.735
ITU-T I.431
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