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參數(shù)資料
| 型號(hào)： | T7289A |
| 廠(chǎng)商： | Lineage Power |
| 英文描述： | DS1 Line Interface(DS1 線(xiàn)接口) |
| 中文描述： | DS1的線(xiàn)路接口（DS1的線(xiàn)接口） |
| 文件頁(yè)數(shù)： | 10/18頁(yè) |
| 文件大?。?/td> | 285K |
| 代理商： | T7289A |
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Data Sheet
January 1998
T7289A DS1 Line Interface
10
Lucent Technologies Inc.
Digital Logic
(continued)
Single-Rail/Dual-Rail Option
(continued)
Alarms
An independent loss-of-clock (
LOC
) output is provided
so that loss of clock is detected when the shutdown
option is in effect.
LOS
and
LOC
can be wire-ORed to
produce a single alarm.
A bipolar violation (BPV) output is included, giving an
alarm each time a violation (two or more successive 1s
on a rail) occurs. The violation alarm output is held in a
latch for one cycle of the internal clock (RCLK). In the
B8ZS mode, bipolar violations within the legal substitu-
tion code are not detected and, therefore, do not pro-
duce an alarm. The bipolar violation function is
disabled when dual = 1.
An alarm test pin (
ALMT
) is provided to test the alarm
outputs,
LOS
,
LOC
, and BPV. Clearing this pin forces
the alarm outputs to the alarm state without affecting
data transmission.
In order to meet the requirement that the system not
report LOS for a string of <100 consecutive 0s and that
LOS be reported for
≥
250 consecutive 0s, the digital
LOS threshold counter is set at 128. However, between
32 and 64 consecutive 0s, the device changes from
locking on incoming data to locking on TCLK. If the
phase of TCLK is sufficiently different from the received
data, the device can count both 1s and 0s as 0s. This
can cause the digital LOS counter to exceed its thresh-
old, even though the number of consecutive 0s in the
data is less than 100.
B8ZS Option
The T7289A device contains a B8ZS encoder and
decoder that can be selected by setting the BZSC pin.
This allows the encoder to substitute a zero-substitu-
tion code for eight consecutive 0s detected in the data
stream, as illustrated in Table 4. A V represents a viola-
tion of bipolar code, and a B represents a bipolar pulse
of correct polarity. The decoder detects the zero-substi-
tution code and reinserts eight 0s in the data stream.
The B8ZS option is disabled when dual = 1.
Table 4. B8ZS Substitution Code
Blue-Signal (AIS) Generators
There are two blue-signal generators in this device. If
RBC = 1, an all-1s signal is output on the receive data
Before B8ZS
After B8ZS
00000000
000VB0VB
output pin(s). If TBC = 1, a bipolar all-1s signal is trans-
mitted through T2 and R2 and into the network. Both
receive and transmit blue signals are synchronous with
BCLK.
Loopback Paths
The T7289A device has three independent loopback
paths that are activated by clearing the respective con-
trol inputs,
LP1
,
LP2
, or
LP3
. Loopback 1 bridges the
data stream from the transmit converter (transmit con-
verter included) to the input of the receive converter.
The maintenance loop includes most of the internal cir-
cuitry.
Loopback 2 provides a loopback of data from the bipo-
lar inputs (T1, R1) and the associated recovered clock
to the bipolar outputs of the transmit converter (T2, R2).
The receive front end, receive PLL, and transmit driver
circuitry are all exercised. The loop can be used to iso-
late failures between systems.
Loopback 3 loops the data stream as in loopback 1, but
bypasses the transmit and receive converters. The blue
signal can be transmitted towards the DSX when in this
loopback. Loopbacks 2 and 3 can be operated simulta-
neously to provide transmission loops in both direc-
tions.
Device Anomaly
T7289A-EL, T7289A-PL, T7289A-EL2, and
T7289A-PL2
The T7289A-EL, T7289A-PL, T7289A-EL2, and
T7289A-PL2 devices have been found to be sensitive to
slow powerup ramp on the +5 V device supply. In gen-
eral, if the powerup time is >50
μ
s, the device may not
operate properly. The device must be power-cycled with
a power-ramp interval of less than 50
μ
s to clear the
condition. This anomaly is corrected in the T7289A-EL4
and T7289A-PL4.
T7289A-EL, T7289A-PL, T7289A-EL2,
T7289A-PL2, T7289A-EL3, and T7289A-PL3
The T7289A-EL, T7289A-PL, T7289A-EL2, T7289A-
PL2, T7289A-EL3, and T7289A-PL3 devices have been
found to be sensitive to voltage surges on the transmit
analog interface leads. The device may latch-up when
excessive voltage surges are present on the line. The
device must be power-cycled to clear the condition. The
immunity to voltage surges has been enhanced in the
T7289A-EL4 and T7289A-PL4.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T7289A-EL | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:DS1 LINE INTERFACE |
| T7289A-EL4 | 制造商:Legerity 功能描述:IC,PCM TRANSCEIVER,SINGLE,T-1(DS1),CMOS,SOJ,28PIN,PLASTIC |
| T7289A-PL | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:DS1 LINE INTERFACE |
| T7290 | 制造商:TE Connectivity 功能描述: |
| T-7290 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:T7290 DS1/T1/CEPT Line Interface |
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