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參數(shù)資料
| 型號： | STV0196 |
| 廠商： | 意法半導體 |
| 英文描述： | QPSK/BPSK DEMODULATOR AND FEC IC |
| 中文描述： | 調(diào)制/ BPSK調(diào)制解調(diào)器和FEC集成電路 |
| 文件頁數(shù)： | 13/23頁 |
| 文件大?。?/td> | 236K |
| 代理商： | STV0196 |
X - CONVOLUTIONAL DE-INTERLEAVER
This is a 204 x 12 convolutional interleaver in
Mode A; the periodicity of 204 bytes for syncbyte
is preserved.
Thede-interleavermaybeskipped(seeRSregister).
XI - REED-SOLOMONDECODER
ANDDESCRAMBLER
The input blocks are 204 byte long with 16 parity
bytes in Mode A; the synchro byte is the first byte
of the block. Up to 8 byte errors may be fixed.
Code Generatorpolynom:
g(x) = (x -
ω
0
) (x -
ω
1
) (...)(x -
ω
15
)
over the Galois Field generated by :
X
8
+ X
4
+ X
3
+ X
2
+ 1 =0
Energy dispersal descrambler :
Output energy dispersal descrambler generator :
X
15
+ X
14
+ 1
The polynom is initialised every eight blocks with
the sequence 100101010000000. The synchro
words are unscrambled.
Control register: RS register
InternalAddress : Hex0A
The reset value is written in each registercell
RS7
RS6
RS5
RS4
1
0
1
1
RS3
1
RS2
0
RS1
0
RS0
0
RS7 : De-interleaverEnable
If 1, the input flow is deinterleaved.
If 0, the flow is not affected.
RS6 : If 0, Output data are corrected bytes
(normal operatingmode).
If1,OutputdataareReed-Solomoncorrection
bytes(error countmode)(seeNote 1).
RS5 : Reed-SolomonEnable
If 1, theinput code is corrected.
If 0, no correctionhappens;all the data are
fed to the descrambler.
The error signal remains inactive.
RS4 : DescramblerEnable
If 1, the output flow from Reed-Solomon
decoder is descrambled.
If 0, thedescrambler is desactived.
RS3 : Write Error Bit
If RS3=1, anduncorrectibleerror happens,
the MSBof the first byte following the sync
byte is forcedto 1afterdescrambling.
RS2 : Super Synchro Suppression
If RS2=1, all synchro bytes are Hex47 in
mode A.
If RS2=0, the synchro is complemented
every8thpacket.Itallows, whenscrambler
is off, to provide RS coded signals for use
in low-cost SMATV interface.
RS1 : Output Clock Polarity
If RS1=0, data and control signals change
during high to low transitionof CK_OUT.
If RS1=1, they change during the low to
high transition.
RS0 : Output Clock Configuration
If RS0=0,CK_OUT is continuous.
If RS0=1,CK_OUT remains low duringthe
parity bits.
Note 1:
When RS6 = 1, the output data are the correction bytes
applied todata incoming the Reed-Solomon block.
The number of bits at 1 in these output data represent
therefore thenumber of errors remaining at the outputof
VITERBIdecoder.
All null output data mean no error left after VITERBI
decoding.
Remark:
Output datas are meaningless when error flag (Pin 34) is
set tohigh level.
FUNCTIONAL DESCRIPTION
(continued)
Data
Parity
No Error
Uncorrected Packet
No Error
CK_OUT
D/P
STR_OUT
ERROR
RS0=0, RS1=0
RS0=1, RS1=0
RS0=0, RS1=1
RS0=1, RS1 =1
Data
Parity
Data
Parity
0
Figure3
STV0196B
13/23
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STV0196B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:QPSK/BPSK DEMODULATOR AND FEC IC |
| STV02 | 功能描述:DIP 開關(guān)/ SIP 開關(guān) 2 POS SIP SWITCH RoHS:否 制造商:Omron Electronics 位置數(shù)量:10 開關(guān)類型:DIP 執(zhí)行器:Rotary 端子節(jié)距:2.54 mm 觸點形式: 端接類型:Solder Pin 電流額定值:100 mA 電壓額定值 DC: 工作溫度范圍: 安裝:Through Hole |
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| STV0289 | 制造商:STMicroelectronics 功能描述: |
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