- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382555 > STA400A (意法半導體) XMRADIO SDARS CHANNEL DECODER PDF資料下載
參數(shù)資料
| 型號： | STA400A |
| 廠商： | 意法半導體 |
| 英文描述： | XMRADIO SDARS CHANNEL DECODER |
| 中文描述： | XMRADIO衛(wèi)星數(shù)字收音機信道解碼器 |
| 文件頁數(shù)： | 24/117頁 |
| 文件大?。?/td> | 910K |
| 代理商： | STA400A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁
STA400A
24/117
I
PCTS_EF, Payload Channel TSCC Sync / Reed-Solomon Error Flag
The PCDC frequency can be set from 11.96 MHz to 373.75 kHz via the 5 MSBs of the PCDC_CONF register
(PCDC_CONF[6:2]); the clock polarity and the clock configuration (always running or fixed to '1' when the inter-
face is not transmitting data) can be configured via the PCDC_CONF[1] and the PCDC_CONF[0] bits respec-
tively.
The PCSD data format can be set via the PCSD_CONF register; PCSD_CONF[0] and PCSD_CONF[1] define
if data are transmitted MSB or LSB first and if a parity bit is appended or not to each data byte respectively
The calculated parity can be even or odd depending on the content of PCSD_CONF[2] bit.
PCFS is the PRC packet synchronization; the default setting is one pulse at the beginning of each burst of 448
bytes. PCBS is a byte synchronization signal with one pulse at the beginning of each decoded data byte (de-
fault configuration).
PCTS_EF can be configured as the TSCC synchronization signal (default configuration) or as the Reed-So-
lomon error flag signal. The TSCC synchronization is a pulsed signal having period T=432ms (one pulse every
TDM frame).
The width of the synchronization pulses is equal to 1 PCDC cycle. The parameters of these last three signals
can be configured via the PCSYNC_CONF register.
1.7 MICROPOCESSOR INTERFACE
Data communication between the microcontroller and the device takes place through the 2 wires (SDA and
SCL) IIC-bus interface. The STA400A is always a slave device.
The STA400A Register Map is organized in 8 main pages with a base address given in Table 2.2. After the de-
vice address, to read or write a register, the microcontroller must send first the base-address to select one of
the 8 pages and a relative-address to select the register inside the page. The STA400A has byte or multibytes
registers access with different classes (see table 2.1); the complete list of the registers is given in the Register
Map section.
Interrupt Line
The interrupt line of the STA400A (pin 53 - INTR) OR-Wires 8 different interrupt requests from the CDEC that
can be individually masked by the registers IRQ1_MASK (address 0x0417).
The interrupt vector is represented by the IRQ1_STATUS register (address 0x0419) described in section 2.6.
After an interrupt request, the INTR pin remains at high level, except for the MFP_CLK interrupt bit5, that is an
impulse periodic signal. The IRQ1_STATUS interrupt vector may be automatically reset after the read operation
or may be reset by the microcontroller (writing 0x00) depending on the bit0 of the CONTROL register (see sec-
tion 2.6)
IIC-BUS Specification
The I2C-bus protocol defines any device that sends data on to the bus as a transmitter and any device that reads
the data as a receiver. The device that controls the data transfer is known as the master and the others as the
slave. The master will always initiate the transfer and will provide the serial clock for synchronisation.
Data Transition or Change
Data changes on the SDA line must only occur when the SCL clock is low. SDA transitions while the clock
is high are used to identify START or STOP condition.
Start Condition
START is identified by a high to low transition of the data bus SDA signal while the clock signal SCL is
相關PDF資料 |
PDF描述 |
|---|---|
| STA450A | XMRADIO SDARS SERVICE LAYER & SOURCE DECODER |
| STA508 | 40V 4.5A QUAD POWER HALF BRIDGE |
| STABP01 | GT 7C 7#16S SKT PLUG RTANG |
| STABP01D | GT 5C 5#16S SKT PLUG |
| STB10NA40 | N-Channel Enhancement Mode Fast Power MOS Transistor(N溝道增強模式快速功率MOSFET) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| STA400AV WAF | 制造商:Texas Instruments 功能描述: |
| STA400MTEP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| STA400MTEP/NOPB | 制造商:Texas Instruments 功能描述:Analog Multiplexer Dual 2:1 20-Pin TSSOP Rail |
| STA401 | 制造商:Distributed By MCM 功能描述:SUB ONLY SANKEN TRANSISOR ARRY 10-PIN SIP |
| STA401A | 制造商:Sanken Electric Co Ltd 功能描述:Trans Darlington NPN 70V 4A 10-Pin SIP Box 制造商:Sanken Electric Co Ltd 功能描述:TRANS ARRAY SINK DVR NPN 10-SIP 制造商:Panasonic Industrial Company 功能描述:TRANSISTOR SELL STA401A |
發(fā)布緊急采購，3分鐘左右您將得到回復。