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STA400A
two embedded ADCs. This functionality gives the possibility to use two external ADCs connected to the satellite
digital input (IF2SD[7:0]) and to the terrestrial digital input (IF2TD[9:0]) respectively. The digital inputs must be
tied to ground when not used.
The FTESTOUT[15:0] pins are available for testing purpose and for measuring system performance.
1.1 IF SAMPLING AND CONTROL INTERFACE
This block comprises the embedded ADCs, the satellite and terrestrial AGCs and CDEC CONTROL registers.
It receives from the RF Front-End the two QPSK modulated satellite signals centered at 6.095 MHz and the Mul-
tiCarrier Modulated terrestrial signal centered at 2.99 MHz (2nd IF frequencies). These signals are over sampled
by the 23.92 MHz master clock (MCLK) and converted to digital on 8 bits for the satellite composite signal and
on 10 bits for the terrestrial signal (see fig.1).
The programmable registers of the IF Sampling block are described in section 2.6.
Embedded ADCs
The two embedded ADCs are 10 bit high speed A/D converters designed for high sampling rate (up to 50 MHz)
and low power consumption (1mW/MHz) with a full differential pipeline conversion architecture that needs 6
clock periods for one conversion.
A voltage reference is integrated in the circuit for external components minimization but it is possible to use an
external reference.
The ADCs provide also a reduced input capacitance, a low reference capability and a wide input bandwidth
(50MHz).
Pins IF2xA_P IF2xA_N can be connected as full-differential inputs or as pseudo-differential input. In fig.4 the
latter configuration is showed (x=S for Satellite and x=T for Terrestrial branch).
Figure 4. ADC Pseudo-Differental Configuration
The two pins xREFM (Bottom of the reference ladder) and xREFP (Top of the reference ladder) are decoupling
nodes for conversion dynamic adjustment; when the internal reference is used these pins must be connected
as showed in figure 4. Pin xADCREF is connected with an external resistor (typical value 47 Kohm) to trim the
internal bias current, xINCM is the output common mode used to centre the external input network and xVCMO
is the internal common mode that can be externally filtered by a capacitor.
27pF
47pF
33ohm
50ohm
VIN
100nF
2.2uF
47K
33ohm
50ohm
xVCMO
xREFP
DATA[9:0]
xREFM
IF2xA_N
IF2xA_P
xINCM
xADCREF
100pF
100nF
100nF
100pF
FROM
INTERNAL CLK
DISTRIBUTION