參數(shù)資料
型號: ST92E141K4D1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CDIP32
封裝: WINDOWED, SHRINK, CERAMIC, DIP-32
文件頁數(shù): 134/178頁
文件大小: 1097K
代理商: ST92E141K4D1
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ST92141 - INTERRUPTS
WAKE-UP / INTERRUPT LINES MANAGEMENT UNIT (Cont’d)
3.12.5 Register Description
WAKE-UP CONTROL REGISTER (WUCTRL)
R249 - Read/Write
Register Page: 57
Reset Value: 0000 0000 (00h)
Bit 2 = STOP:
Stop bit.
To enter STOP Mode, write the sequence 1,0,1 to
this bit with three consecutive write operations.
When a correct sequence is recognized, the
STOP bit is set and the RCCU puts the MCU in
STOP Mode. The software sequence succeeds
only if the following conditions are true:
– The WKUP-INT bit is 1,
– All unmasked pending bits are reset,
– At least one mask bit is equal to 1 (at least one
external wake-up line is not masked).
Otherwise the MCU cannot enter STOP mode, the
program code continues executing and the STOP
bit remains cleared.
The bit is reset by hardware if, while the MCU is in
STOP mode, a wake-up interrupt comes from any
of the unmasked wake-up lines. The STOP bit is at
1 in the two following cases (See “Wake-up Mode
Selection” on page 56. for details):
– After the first write instruction of the sequence (a
1 is written to the STOP bit)
– At the end of a successful sequence (i.e. after
the third write instruction of the sequence)
WARNING: Writing the sequence 1,0,1 to the
STOP bit will enter STOP mode only if no other
register write instructions are executed during the
sequence. If Interrupt or DMA requests (which al-
ways perform register write operations) are ac-
knowledged during the sequence, the ST9 will not
enter STOP mode: the user must re-enter the se-
quence to set the STOP bit.
WARNING: Whenever a STOP request is issued
to the MCU, a few clock cycles are needed to enter
STOP mode (see RCCU chapter for further de-
tails). Hence the execution of the instruction fol-
lowing the STOP bit setting sequence might start
before entering STOP mode: if such instruction
performs a register write operation, the ST9 will
not enter in STOP mode. In order to avoid to exe-
cute register write instructions after a correct
STOP bit setting sequence and before entering
the STOP mode, it is mandatory to execute 3 NOP
instructions after the STOP bit setting sequence.
Bit 1 = ID1S:
Interrupt Channel INTD1 Source.
This bit is set and cleared by software.
0: INT7 external interrupt source selected, exclud-
ing wake-up line interrupt requests
1: The 16 external wake-up lines enabled as inter-
rupt sources, replacing the INT7 external pin
function
WARNING: To avoid spurious interrupt requests
on the INTD1 channel due to changing the inter-
rupt source, do the following before modifying the
ID1S bit:
1. Mask the INTD1 interrupt channel (bit 7 of reg-
ister EIMR - R244, Page 0 - reset to 0).
2. Program the ID1S bit as needed.
3. Clear the IPD1 interrupt pending bit (bit 7 of
register EIPR - R243, Page 0).
4. Remove the mask on INTD1 (bit EIMR.7=1).
Bit 0 = WKUP-INT:
Wakeup Interrupt.
This bit is set and cleared by software.
0: The 16 external wakeup lines can be used to
generate interrupt requests
1: The 16 external wake-up lines to work as wake-
up sources for exiting from STOP mode
70
-
----
STOP
ID1S
WKUP- INT
1
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