參數(shù)資料
型號： ST92E141K4D1
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CDIP32
封裝： WINDOWED, SHRINK, CERAMIC, DIP-32
文件頁數(shù)： 131/178頁
文件大?。?/td> 1097K
代理商： ST92E141K4D1
56/178
ST92141 - INTERRUPTS
WAKE-UP / INTERRUPT LINES MANAGEMENT UNIT (Cont’d)
3.12.3 Functional Description
3.12.3.1 Interrupt Mode
To configure the 16 wake-up lines as interrupt
sources, use the following procedure:
1. Configure the mask bits of the 16 wake-up lines
(WUMRL, WUMRH).
2. Configure the triggering edge registers of the
wake-up lines (WUTRL, WUTRH).
3. Set bit 7 of EIMR (R244 Page 0) and EITR
(R242 Page 0) registers of the CPU: so an
interrupt coming from one of the 16 lines can be
correctly acknowledged.
4. Reset the WKUP-INT bit in the WUCTRL regis-
ter to disable Wake-up Mode.
5. Set the ID1S bit in the WUCTRL register to dis-
able the INT7 external interrupt source and
enable the 16 wake-up lines as external inter-
rupt source lines.
To return to standard mode (INT7 external inter-
rupt source enabled and 16 wake-up lines disa-
bled) it is sufficient to reset the ID1S bit.
3.12.3.2 Wake-up Mode Selection
To configure the 16 lines as wake-up sources, use
the following procedure:
1. Configure the mask bits of the 16 wake-up lines
(WUMRL, WUMRH).
2. Configure the triggering edge registers of the
wake-up lines (WUTRL, WUTRH).
3. Set, as for Interrupt Mode selection, bit 7 of
EIMR and EITR registers only if an interrupt
routine is to be executed after a wake-up event.
Otherwise, if the wake-up event only restarts
the execution of the code from where it was
stopped, the INTD1 interrupt channel must be
masked or the external source must be
selected by resetting the ID1S bit.
4. Since the RCCU can generate an interrupt
request when exiting from STOP mode, take
care to mask it even if the wake-up event is
only to restart code execution.
5. Set the WKUP-INT bit in the WUCTRL register
to select Wake-up Mode.
6. Set the ID1S bit in the WUCTRL register to dis-
able the INT7 external interrupt source and
enable the 16 wake-up lines as external inter-
rupt source lines. This is not mandatory if the
wake-up event does not require an interrupt
response.
7. Write the sequence 1,0,1 to the STOP bit of the
WUCTRL register with three consecutive write
operations. This is the STOP bit setting
sequence.
To detect if STOP Mode was entered or not, im-
mediately after the STOP bit setting sequence,
poll the RCCU EX_STP bit (R242.7, Page 55) and
the STOP bit itself.
3.12.3.3 STOP Mode Entry Conditions
Assuming the ST9 is in Run mode: during the
STOP bit setting sequence the following cases
may occur:
Case 1: Wrong STOP bit setting sequence
This can happen if an Interrupt/DMA request is ac-
knowledged during the STOP bit setting se-
quence. In this case polling the STOP and
EX_STP bits will give:
STOP = 0, EX_STP = 0
This means that the ST9 did not enter STOP mode
due to a bad STOP bit setting sequence: the user
must retry the sequence.
Case 2: Correct STOP bit setting sequence
In this case the ST9 enters STOP mode.
To exit STOP mode, a wake-up interrupt must be
acknowledged. That implies:
STOP = 0, EX_STP = 1
This means that the ST9 entered and exited STOP
mode due to an external wake-up line event.
Case 3: A wake-up event on the external wake-
up lines occurs during the STOP bit setting se-
quence
There are two possible cases:
1. Interrupt requests to the CPU are disabled: in
this case the ST9 will not enter STOP mode, no
interrupt service routine will be executed and
the program execution continues from the
instruction following the STOP bit setting
sequence. The status of STOP and EX_STP
bits will be again:
STOP = 0, EX_STP = 0
The application can determine why the ST9 did
not enter STOP mode by polling the pending
bits of the external lines (at least one must be at
1).
1
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