參數(shù)資料
型號： ST7PDALIF2M6
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI
中文描述： 8位單電壓閃存存儲器，數(shù)據(jù)EEPROM，模數(shù)轉(zhuǎn)換器，定時器，SPI和大理微控制器
文件頁數(shù)： 103/141頁
文件大?。?/td> 2175K
代理商： ST7PDALIF2M6
ST7DALI
103/141
13.3.2 Operating Conditions with Low Voltage Detector (LVD)
T
A
= -40 to 85°C, unless otherwise specified
Note:
1. Not tested in production.
2. Not tested in production. The V
DD
rise time rate condition is needed to insure a correct device power-on and LVD reset.
When the V
DD
slope is outside these values, the LVD may not ensure a proper reset of the MCU.
13.3.3 Auxiliary Voltage Detector (AVD) Thresholds
T
A
= -40 to 85°C, unless otherwise specified
Note:
1. Not tested in production.
13.3.4 Internal RC Oscillator and PLL
The ST7 internal clock can be supplied by an internal RC oscillator and PLL (selectable by option byte).
Symbol
Parameter
Conditions
Min
4.00
1)
3.40
1)
2.65
1)
3.80
3.20
2.40
Typ
Max
Unit
V
IT+
(LVD)
Reset release threshold
(V
DD
rise)
High Threshold
Med. Threshold
Low Threshold
High Threshold
Med. Threshold
Low Threshold
V
IT+
(LVD)
-V
IT-
(LVD)
4.25
3.60
2.90
4.05
3.40
2.70
200
4.50
3.80
3.15
4.30
1)
3.65
1)
2.90
1)
V
V
IT-
(LVD)
Reset generation threshold
(V
DD
fall)
V
hys
Vt
POR
t
g(VDD)
I
DD(LVD
)
LVD voltage threshold hysteresis
V
DD
rise time rate
2)
Filtered glitch delay on V
DD
LVD/AVD current consumption
mV
μ
s/V
ns
μ
A
20
20000
150
Not detected by the LVD
220
Symbol
Parameter
Conditions
Min
4.40
1)
3.90
1)
3.20
1)
4.30
3.70
2.90
Typ
4.70
4.10
3.40
4.60
3.90
3.20
150
Max
5.00
4.30
3.60
4.90
1)
4.10
1)
3.40
1)
Unit
V
IT+
(AVD)
1=>0 AVDF flag toggle threshold
(V
DD
rise)
High Threshold
Med. Threshold
Low Threshold
High Threshold
Med. Threshold
Low Threshold
V
IT+
(AVD)
-V
IT-
(AVD)
V
V
IT-
(AVD)
0=>1 AVDF flag toggle threshold
(V
DD
fall)
V
hys
AVD voltage threshold hysteresis
Voltage drop between AVD flag set
and LVD reset activation
mV
V
IT-
V
DD
fall
0.45
V
Symbol
V
DD(RC)
V
DD(x4PLL)
V
DD(x8PLL)
Parameter
Conditions
Min
2.4
2.4
3.3
Typ
Max
5.5
3.3
5.5
Unit
Internal RC Oscillator operating voltage
x4 PLL operating voltage
x8 PLL operating voltage
V
t
STARTUP
PLL Startup time
60
PLL
input
clock
(f
PLL
)
cycles
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