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參數(shù)資料
| 型號： | ST7LNB0V2Y0M6 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 8 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-16 |
| 文件頁數(shù)： | 14/30頁 |
| 文件大?。?/td> | 451K |
| 代理商： | ST7LNB0V2Y0M6 |
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ST7LNB0V2Y0
Electrical characteristics
Figure 7.
Two typical applications with unused I/O pin
Figure 8.
Typical IPU vs. VDD with VIN=VSS
Table 21.
General characteristics
Symbo
l
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
0.3VDD
V
VIH
Input high level voltage
0.7VDD
Vhys
Schmitt trigger voltage
hysteresis(1)
1.
Data based on characterization results, not tested in production.
400
mV
IL
Input leakage current
VSS ≤ VIN ≤ VDD
±1
A
IS
Static current consumption(2)
2.
Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of
the I/O for example or an external pull-up or pull-down resistor (see Figure 7). Data based on design
simulation and/or technology characteristics, not tested in production.
Floating input mode
200
RPU
Weak pull-up equivalent
resistor(3)
3.
The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current
characteristics described in Figure 8).
VIN =VSS, VDD =5 V
50
120
250
k
CIO
I/O pin capacitance
5
pF
tf(IO)out
Output high to low level fall
CL =50pF
Between 10% and 90%
25
ns
tr(IO)out
Output low to high level rise
25
10 k
UNUSED I/O PORT
ST7LNB0V2Y0
10 k
UNUSED I/O PORT
ST7LNB0V2Y0
VDD
0
10
20
30
40
50
60
70
80
90
2
2 .5
3
3 .5
4
4.5
5
5 .5
6
Vdd (V )
Ip
u
(u
A
)
T a = 1 40°C
Ta = 9 5 °C
Ta = 2 5 °C
Ta = -4 5 °C
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| ST7LNB0V2Y0M6TR | 制造商:STMicroelectronics 功能描述: |
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