參數(shù)資料
型號: ST7LNB0V2Y0M6
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 8 MHz, MICROCONTROLLER, PDSO16
封裝: 0.150 INCH, PLASTIC, SOP-16
文件頁數(shù): 13/30頁
文件大?。?/td> 451K
代理商: ST7LNB0V2Y0M6
Electrical characteristics
ST7LNB0V2Y0
6.5.3
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU and DLU) using specific measurement methods, the
product is stressed in order to determine its performance in terms of electrical sensitivity.
For more details, refer to the application note AN1181.
Electrostatic discharge (ESD)
Electrostatic Discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts*(n+1) supply pin). This test
conforms to the JESD22-A114A/A115A standard.
Static and dynamic latch-up
LU: 3 complementary static tests are required on 10 parts to assess the latch-up
performance. A supply overvoltage (applied to each power supply pin) and a current
injection (applied to each input, output and configurable I/O pin) are performed on each
sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details,
refer to the application note AN1181.
DLU: Electrostatic discharges (one positive then one negative test) are applied to each
pin of 3 samples when the micro is running to assess the latch-up performance in
dynamic mode. Power supplies are set to the typical values, the oscillator is connected
as near as possible to the pins of the micro and the component is put in reset mode.
This test conforms to the IEC1000-4-2 and SAEJ1752/3 standards. For more details,
refer to the application note AN1181.
I/O PORT PIN CHARACTERISTICS
6.6
I/O port characteristics
6.6.1
General characteristics
Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.
Table 19.
Absolute maximum ratings
Symbol
Ratings
Conditions
Maximum
value(1)
1.
Data based on characterization results, not tested in production.
Unit
VESD(HBM)
Electrostatic discharge voltage
(human body model)
TA=+25 °C
4000
V
Table 20.
Electrical sensitivities
Symbol
Parameter
Conditions
Class(1)
1.
Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the
JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B
Class strictly covers all the JEDEC criteria (international standard).
LU
Static latch-up class
TA=+25 °C
A
DLU
Dynamic latch-up class
VDD=5.5 V, fOSC=4MHz,
TA=+25 °C
A
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