參數(shù)資料
型號: ST72C171
廠商: 意法半導(dǎo)體
英文描述: 8-BIT MCU with 8K FLASH, ADC, WDG, SPI, SCI, TIMERS SPGAs Software Programmable Gain Amplifiers, OP-AMP
中文描述: 8位8K閃存,ADC的,水分散粒劑,SPI和脊髓損傷,定時器SPGAs軟件可編程增益放大器,運算放大器控制器
文件頁數(shù): 83/152頁
文件大?。?/td> 1384K
代理商: ST72C171
ST72C171
83/152
SERIAL COMMUNICATIONS INTERFACE
(Cont’d)
7.7.4.4 Baud Rate Generation
The baud rates for the receiver and transmitter (Rx
and Tx) are set independently and calculated as
follows:
f
CPU
with:
PR = 1, 3, 4 or 13 (see SCP0 & SCP1 bits)
TR = 1, 2, 4, 8, 16, 32, 64,128
(see SCT0, SCT1 & SCT2 bits)
RR = 1, 2, 4, 8, 16, 32, 64,128
(see SCR0,SCR1 & SCR2 bits)
All these bits are in the BRR register.
Example:
If f
CPU
is 8 MHz and if PR=13 and
TR=RR=1, the transmit and receive baud rates are
19200 bauds.
Note:
The baud rate registers MUST NOT be
changed while the transmitter or the receiver is en-
abled.
7.7.4.5 Receiver Muting and Wake-up Feature
In multiprocessor configurations it is often desira-
ble that only the intended message recipient
should actively receive the full message contents,
thus reducing redundant SCI service overhead for
all non addressed receivers.
The non addressed devices may be placed in
sleep mode by means of the muting function.
Setting the RWU bit by software puts the SCI in
sleep mode:
All the reception status bits can not be set.
All the receive interrupt are inhibited.
A muted receiver may be awakened by one of the
following two ways:
– by Idle Line detection if the WAKE bit is reset,
– by Address Mark detection if the WAKE bit is set.
The Receiver wakes-up by Idle Line detection
when the Receive line has recognised an Idle
Frame. Then the RWU bit is reset by hardware but
the IDLE bit is not set.
The Receiver wakes-up by Address Mark detec-
tion when it received a “1” as the most significant
bit of a word, thus indicating that the message is
an address. The reception of this particular word
wakes up the receiver, resets the RWU bit and
sets the RDRF bit, which allows the receiver to re-
ceive this word normally and to use it as an ad-
dress word.
Tx =
(32
*
PR)
*
TR
Rx =
(32
*
PR)
*
RR
f
CPU
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