參數(shù)資料
型號: ST72C171
廠商: 意法半導(dǎo)體
英文描述: 8-BIT MCU with 8K FLASH, ADC, WDG, SPI, SCI, TIMERS SPGAs Software Programmable Gain Amplifiers, OP-AMP
中文描述: 8位8K閃存,ADC的,水分散粒劑,SPI和脊髓損傷,定時器SPGAs軟件可編程增益放大器,運(yùn)算放大器控制器
文件頁數(shù): 31/152頁
文件大?。?/td> 1384K
代理商: ST72C171
ST72C171
31/152
I/O PORTS
(Cont’d)
7.1.2.4 Analog Alternate Function
When the pin is used as an ADC input the I/O must
be configured as input, floating. The analog multi-
plexer (controlled by the ADC registers) switches
the analog voltage present on the selected pin to
the common analog rail which is connected to the
ADC input.
It is recommended not to change the voltage level
or loading on any port pin while conversion is in
progress. Furthermore it is recommended not to
have clocking pins located close to a selected an-
alog pin.
Warning
: The analog input voltage level must be
within the limits stated in the Absolute Maximum
Ratings.
7.1.2.5 I/O Port Implementation
The hardware implementation on each I/O port de-
pends on the settings in the DDR and OR registers
and specific feature of the I/O port such as ADC In-
put (see
Figure 26
) or true open drain. Switching
these I/O ports from one state to another should
be done in a sequence that prevents unwanted
side effects. Recommended safe transitions are il-
lustrated in
Figure 25
. Other transitions are poten-
tially risky and should be avoided, since they are
likely to present unwanted side-effects such as
spurious interrupt generation.
Figure 25. Recommended I/O State Transition Diagram
with interrupt
INPUT
OUTPUT
no interrupt
INPUT
push-pull
open-drain
OUTPUT
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