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參數(shù)資料
| 型號： | SSTUB32S869BHLFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC REGIST BUFF 14BIT DDR2 150BGA |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Dec/2011 |
| 標準包裝： | 2,000 |
| 類型： | 緩沖器 |
| Tx/Rx類型： | LVCMOS |
| 延遲時間： | 3.0ns |
| 電容 - 輸入： | 3.5pF |
| 電源電壓： | 1.7 V ~ 1.9 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 150-TFBGA |
| 供應(yīng)商設(shè)備封裝： | 150-CABGA（8x13） |
| 包裝： | 帶卷 (TR) |
16
ICSSSTUB32S869B
Advance Information
1203—04/11/06
(1) CL includes probe and jig capacitance.
Figure 22 — Partial parity out load circuit
VTT = VDD/2
VICR Cross Point Voltage
Vi(P-P) = 600mV
tPLH and tPHL are the same as tPD.
Figure 23 — Partial parity out voltage waveform, propagation delay time with respect to CLK input
RL=1K
CL=5pF
DUT
OUT
Testpoint
See Note (1)
CK
tPLH
tPHL
VICR
Vi(P-P)
VTT
Output
VTT
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